From 45c85878613108c238e491aa69650fcad1fba4bb Mon Sep 17 00:00:00 2001 From: krachlatte Date: Wed, 17 May 2023 00:55:30 +0200 Subject: [PATCH] Improve SD card compatibility on Radxa E25 (#5165) --- config/boards/radxa-e25.wip | 2 +- .../board-radxa-e25-sdmmc0-fix.legacy.patch | 42 + .../rockchip64-6.1/add-board-radxa-e25.patch | 773 ++++++++++++++++++ .../board-radxa-e25-sdmmc0-fix.patch | 16 + .../board-radxa-e25-usb3-and-emmc-fix.patch | 54 ++ 5 files changed, 886 insertions(+), 1 deletion(-) create mode 100644 patch/kernel/archive/rk35xx-5.10/board-radxa-e25-sdmmc0-fix.legacy.patch create mode 100644 patch/kernel/archive/rockchip64-6.1/add-board-radxa-e25.patch create mode 100644 patch/kernel/archive/rockchip64-6.3/board-radxa-e25-sdmmc0-fix.patch create mode 100644 patch/kernel/archive/rockchip64-6.3/board-radxa-e25-usb3-and-emmc-fix.patch diff --git a/config/boards/radxa-e25.wip b/config/boards/radxa-e25.wip index 4aff693997..863421348a 100644 --- a/config/boards/radxa-e25.wip +++ b/config/boards/radxa-e25.wip @@ -2,7 +2,7 @@ BOARD_NAME="Radxa E25" BOARDFAMILY="rk35xx" BOOTCONFIG="radxa-e25-rk3568_defconfig" -KERNEL_TARGET="legacy,edge" +KERNEL_TARGET="legacy,current,edge" FULL_DESKTOP="yes" BOOT_LOGO="desktop" BOOT_FDT_FILE="rockchip/rk3568-radxa-e25.dtb" diff --git a/patch/kernel/archive/rk35xx-5.10/board-radxa-e25-sdmmc0-fix.legacy.patch b/patch/kernel/archive/rk35xx-5.10/board-radxa-e25-sdmmc0-fix.legacy.patch new file mode 100644 index 0000000000..ef0da951f9 --- /dev/null +++ b/patch/kernel/archive/rk35xx-5.10/board-radxa-e25-sdmmc0-fix.legacy.patch @@ -0,0 +1,42 @@ +diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile +index efa5d0d71a63..6d5543dbe316 100644 +--- a/arch/arm64/boot/dts/rockchip/Makefile ++++ b/arch/arm64/boot/dts/rockchip/Makefile +@@ -109,10 +109,13 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nvr-demo-v10.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-nvr-demo-v10-ipc-4x-linux.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nvr-demo-v10-linux.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nvr-demo-v10-linux-spi-nand.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nvr-demo-v12-linux.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nvr-demo-v12-linux-spi-nand.dtb ++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-radxa-e25.dtb ++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb ++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3-a.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-blueberry-edge-v10-linux.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-blueberry-edge-v12-linux.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-blueberry-minipc-linux.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb1-lp4-v10.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb1-lp4-v10-ipc-6x-linux.dtb +diff --git a/arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts b/arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts +index 3cd366e6c762..e21583576bc5 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts +@@ -120,17 +120,15 @@ &sdmmc2 { + status = "disabled"; + }; + + //sdcard + &sdmmc0 { +- max-frequency = <150000000>; +- supports-sd; + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; +- sd-uhs-sdr104; ++ sd-uhs-sdr50; + vmmc-supply = <&vcc3v3_sd>; + vqmmc-supply = <&vccio_sd>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd>; + cd-gpios = <&gpio0 4 GPIO_ACTIVE_LOW>; +-- diff --git a/patch/kernel/archive/rockchip64-6.1/add-board-radxa-e25.patch b/patch/kernel/archive/rockchip64-6.1/add-board-radxa-e25.patch new file mode 100644 index 0000000000..0276786593 --- /dev/null +++ b/patch/kernel/archive/rockchip64-6.1/add-board-radxa-e25.patch @@ -0,0 +1,773 @@ +diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile +index 3308238fd356..5057a61bd92c 100644 +--- a/arch/arm64/boot/dts/rockchip/Makefile ++++ b/arch/arm64/boot/dts/rockchip/Makefile +@@ -89,8 +89,9 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-a.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-b.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-roc-pc.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-soquartz-cm4.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-bpi-r2-pro.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb ++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-radxa-e25.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb + + subdir-y := $(dts-dirs) overlay +diff --git a/arch/arm64/boot/dts/rockchip/rk3568-radxa-cm3i.dtsi b/arch/arm64/boot/dts/rockchip/rk3568-radxa-cm3i.dtsi +new file mode 100644 +index 000000000000..b9d317cab48b +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3568-radxa-cm3i.dtsi +@@ -0,0 +1,429 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++ ++#include ++#include ++#include ++#include "rk3568.dtsi" ++ ++/ { ++ compatible = "radxa,cm3i", "rockchip,rk3568"; ++ ++ aliases { ++ mmc0 = &sdhci; ++ }; ++ ++ chosen { ++ stdout-path = "serial2:115200n8"; ++ }; ++ ++ gpio-leds { ++ compatible = "gpio-leds"; ++ ++ led_user: led-0 { ++ gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; ++ function = LED_FUNCTION_HEARTBEAT; ++ color = ; ++ linux,default-trigger = "heartbeat"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&led_user_en>; ++ }; ++ }; ++ ++ pcie30_avdd0v9: pcie30-avdd0v9-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "pcie30_avdd0v9"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ vin-supply = <&vcc3v3_sys>; ++ }; ++ ++ pcie30_avdd1v8: pcie30-avdd1v8-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "pcie30_avdd1v8"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ vin-supply = <&vcc3v3_sys>; ++ }; ++ ++ vcc3v3_sys: vcc3v3-sys-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vcc5v_input>; ++ }; ++ ++ vcc5v0_sys: vcc5v0-sys-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc5v_input>; ++ }; ++ ++ /* labeled +5v_input in schematic */ ++ vcc5v_input: vcc5v-input-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v_input"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; ++}; ++ ++&combphy0 { ++ status = "okay"; ++}; ++ ++&combphy1 { ++ status = "okay"; ++}; ++ ++&combphy2 { ++ status = "okay"; ++}; ++ ++&cpu0 { ++ cpu-supply = <&vdd_cpu>; ++}; ++ ++&cpu1 { ++ cpu-supply = <&vdd_cpu>; ++}; ++ ++&cpu2 { ++ cpu-supply = <&vdd_cpu>; ++}; ++ ++&cpu3 { ++ cpu-supply = <&vdd_cpu>; ++}; ++ ++&display_subsystem { ++ status = "disabled"; ++}; ++ ++&gpu { ++ mali-supply = <&vdd_gpu>; ++ status = "okay"; ++}; ++ ++&i2c0 { ++ status = "okay"; ++ ++ vdd_cpu: regulator@1c { ++ compatible = "tcs,tcs4525"; ++ reg = <0x1c>; ++ fcs,suspend-voltage-selector = <1>; ++ regulator-name = "vdd_cpu"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <800000>; ++ regulator-max-microvolt = <1150000>; ++ regulator-ramp-delay = <2300>; ++ vin-supply = <&vcc5v_input>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ rk809: pmic@20 { ++ compatible = "rockchip,rk809"; ++ reg = <0x20>; ++ interrupt-parent = <&gpio0>; ++ interrupts = ; ++ #clock-cells = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pmic_int>; ++ rockchip,system-power-controller; ++ wakeup-source; ++ ++ vcc1-supply = <&vcc3v3_sys>; ++ vcc2-supply = <&vcc3v3_sys>; ++ vcc3-supply = <&vcc3v3_sys>; ++ vcc4-supply = <&vcc3v3_sys>; ++ vcc5-supply = <&vcc3v3_sys>; ++ vcc6-supply = <&vcc3v3_sys>; ++ vcc7-supply = <&vcc3v3_sys>; ++ vcc8-supply = <&vcc3v3_sys>; ++ vcc9-supply = <&vcc3v3_sys>; ++ ++ regulators { ++ vdd_logic: DCDC_REG1 { ++ regulator-name = "vdd_logic"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-init-microvolt = <900000>; ++ regulator-initial-mode = <0x2>; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-ramp-delay = <6001>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_gpu: DCDC_REG2 { ++ regulator-name = "vdd_gpu"; ++ regulator-always-on; ++ regulator-init-microvolt = <900000>; ++ regulator-initial-mode = <0x2>; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-ramp-delay = <6001>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_ddr: DCDC_REG3 { ++ regulator-name = "vcc_ddr"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-initial-mode = <0x2>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vdd_npu: DCDC_REG4 { ++ regulator-name = "vdd_npu"; ++ regulator-init-microvolt = <900000>; ++ regulator-initial-mode = <0x2>; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-ramp-delay = <6001>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_1v8: DCDC_REG5 { ++ regulator-name = "vcc_1v8"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdda0v9_image: LDO_REG1 { ++ regulator-name = "vdda0v9_image"; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdda_0v9: LDO_REG2 { ++ regulator-name = "vdda_0v9"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdda0v9_pmu: LDO_REG3 { ++ regulator-name = "vdda0v9_pmu"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <900000>; ++ }; ++ }; ++ ++ vccio_acodec: LDO_REG4 { ++ regulator-name = "vccio_acodec"; ++ regulator-always-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vccio_sd: LDO_REG5 { ++ regulator-name = "vccio_sd"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc3v3_pmu: LDO_REG6 { ++ regulator-name = "vcc3v3_pmu"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcca_1v8: LDO_REG7 { ++ regulator-name = "vcca_1v8"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcca1v8_pmu: LDO_REG8 { ++ regulator-name = "vcca1v8_pmu"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcca1v8_image: LDO_REG9 { ++ regulator-name = "vcca1v8_image"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_3v3: SWITCH_REG1 { ++ regulator-name = "vcc_3v3"; ++ regulator-always-on; ++ regulator-boot-on; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc3v3_sd: SWITCH_REG2 { ++ regulator-name = "vcc3v3_sd"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&pinctrl { ++ leds { ++ led_user_en: led_user_en { ++ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ pmic { ++ pmic_int: pmic_int { ++ rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++}; ++ ++&pmu_io_domains { ++ pmuio1-supply = <&vcc3v3_pmu>; ++ pmuio2-supply = <&vcc3v3_pmu>; ++ vccio1-supply = <&vccio_acodec>; ++ vccio2-supply = <&vcc_1v8>; ++ vccio3-supply = <&vccio_sd>; ++ vccio4-supply = <&vcc_1v8>; ++ vccio5-supply = <&vcc_3v3>; ++ vccio6-supply = <&vcc_1v8>; ++ vccio7-supply = <&vcc_3v3>; ++ status = "okay"; ++}; ++ ++&saradc { ++ vref-supply = <&vcca_1v8>; ++ status = "okay"; ++}; ++ ++&sdhci { ++ bus-width = <8>; ++ max-frequency = <200000000>; ++ non-removable; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; ++ vmmc-supply = <&vcc_3v3>; ++ vqmmc-supply = <&vcc_1v8>; ++ status = "okay"; ++}; ++ ++ ++ ++&sfc { ++ status = "okay"; ++ flash@0 { ++ compatible = "jedec,spi-nor"; ++ reg = <0>; ++ spi-max-frequency = <108000000>; ++ spi-rx-bus-width = <2>; ++ spi-tx-bus-width = <2>; ++ }; ++}; ++ ++&tsadc { ++ rockchip,hw-tshut-mode = <1>; ++ rockchip,hw-tshut-polarity = <0>; ++ status = "okay"; ++}; ++ ++&uart2 { ++ status = "okay"; ++}; ++ ++&usb2phy0 { ++ status = "okay"; ++}; ++ ++&usb2phy1 { ++ status = "okay"; ++}; ++ ++&usb_host0_xhci { ++ extcon = <&usb2phy0>; ++ dr_mode = "host"; ++}; +diff --git a/arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts b/arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts +new file mode 100644 +index 000000000000..38caecb1ef67 +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts +@@ -0,0 +1,230 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++ ++/dts-v1/; ++#include "rk3568-radxa-cm3i.dtsi" ++ ++/ { ++ model = "Radxa E25 Carrier Board"; ++ compatible = "radxa,e25", "radxa,cm3i", "rockchip,rk3568"; ++ ++ aliases { ++ mmc1 = &sdmmc0; ++ }; ++ ++ pwm-leds { ++ compatible = "pwm-leds-multicolor"; ++ ++ multi-led { ++ color = ; ++ max-brightness = <255>; ++ ++ led-red { ++ color = ; ++ pwms = <&pwm1 0 1000000 0>; ++ }; ++ ++ led-green { ++ color = ; ++ pwms = <&pwm2 0 1000000 0>; ++ }; ++ ++ led-blue { ++ color = ; ++ pwms = <&pwm12 0 1000000 0>; ++ }; ++ }; ++ }; ++ ++ vbus_typec: vbus-typec-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vbus_typec_en>; ++ regulator-name = "vbus_typec"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc5v0_sys>; ++ }; ++ ++ vcc3v3_minipcie: vcc3v3-minipcie-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&minipcie_enable_h>; ++ regulator-name = "vcc3v3_minipcie"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc5v0_sys>; ++ }; ++ ++ vcc3v3_ngff: vcc3v3-ngff-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&ngffpcie_enable_h>; ++ regulator-name = "vcc3v3_ngff"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vcc5v0_sys>; ++ }; ++ ++ /* actually fed by vcc5v0_sys, dependent ++ * on pi6c clock generator ++ */ ++ vcc3v3_pcie30x1: vcc3v3-pcie30x1-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pcie30x1_enable_h>; ++ regulator-name = "vcc3v3_pcie30x1"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vcc3v3_pi6c_05>; ++ }; ++ ++ vcc3v3_pi6c_05: vcc3v3-pi6c-05-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pcie_enable_h>; ++ regulator-name = "vcc3v3_pcie"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vcc5v0_sys>; ++ }; ++}; ++ ++&pcie2x1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pcie20_reset_h>; ++ reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; ++ vpcie3v3-supply = <&vcc3v3_pi6c_05>; ++ status = "okay"; ++}; ++ ++&pcie30phy { ++ data-lanes = <1 2>; ++ status = "okay"; ++}; ++ ++&pcie3x1 { ++ num-lanes = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pcie30x1m0_pins>; ++ reset-gpios = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>; ++ vpcie3v3-supply = <&vcc3v3_pcie30x1>; ++ status = "okay"; ++}; ++ ++&pcie3x2 { ++ num-lanes = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pcie30x2_reset_h>; ++ reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>; ++ vpcie3v3-supply = <&vcc3v3_pi6c_05>; ++ status = "okay"; ++}; ++ ++&pinctrl { ++ pcie { ++ pcie20_reset_h: pcie20-reset-h { ++ rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ pcie30x1_enable_h: pcie30x1-enable-h { ++ rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ pcie30x2_reset_h: pcie30x2-reset-h { ++ rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ pcie_enable_h: pcie-enable-h { ++ rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ usb { ++ minipcie_enable_h: minipcie-enable-h { ++ rockchip,pins = <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ ngffpcie_enable_h: ngffpcie-enable-h { ++ rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ vbus_typec_en: vbus_typec_en { ++ rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++}; ++ ++&pwm1 { ++ status = "okay"; ++}; ++ ++&pwm2 { ++ status = "okay"; ++}; ++ ++&pwm12 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pwm12m1_pins>; ++ status = "okay"; ++}; ++ ++&sdmmc0 { ++ bus-width = <4>; ++ cap-sd-highspeed; ++ cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; ++ /* Also used in pcie30x1_clkreqnm0 */ ++ disable-wp; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd>; ++ sd-uhs-sdr50; ++ vmmc-supply = <&vcc3v3_sd>; ++ vqmmc-supply = <&vccio_sd>; ++ status = "okay"; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { ++ status = "okay"; ++}; ++ ++&usb_host0_xhci { ++ extcon = <&usb2phy0>; ++ dr_mode = "host"; ++ status = "okay"; ++}; ++ ++&usb_host1_ehci { ++ status = "okay"; ++}; ++ ++&usb_host1_ohci { ++ status = "okay"; ++}; ++ ++&usb2phy0_otg { ++ phy-supply = <&vbus_typec>; ++ status = "okay"; ++}; ++ ++&usb2phy1_host { ++ phy-supply = <&vcc3v3_minipcie>; ++ status = "okay"; ++}; ++ ++&usb2phy1_otg { ++ phy-supply = <&vcc3v3_ngff>; ++ status = "okay"; ++}; +diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi +index cb5d87f4510c..43b49220b77d 100644 +--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi +@@ -1060,24 +1060,10 @@ sdhci: mmc@fe310000 { + <&cru TCLK_EMMC>; + clock-names = "core", "bus", "axi", "block", "timer"; + status = "disabled"; + }; + +- spdif: spdif@fe460000 { +- compatible = "rockchip,rk3568-spdif"; +- reg = <0x0 0xfe460000 0x0 0x1000>; +- interrupts = ; +- clock-names = "mclk", "hclk"; +- clocks = <&cru MCLK_SPDIF_8CH>, <&cru HCLK_SPDIF_8CH>; +- dmas = <&dmac1 1>; +- dma-names = "tx"; +- pinctrl-names = "default"; +- pinctrl-0 = <&spdifm0_tx>; +- #sound-dai-cells = <0>; +- status = "disabled"; +- }; +- + i2s0_8ch: i2s@fe400000 { + compatible = "rockchip,rk3568-i2s-tdm"; + reg = <0x0 0xfe400000 0x0 0x1000>; + interrupts = ; + assigned-clocks = <&cru CLK_I2S0_8CH_TX_SRC>, <&cru CLK_I2S0_8CH_RX_SRC>; +@@ -1116,10 +1102,32 @@ &i2s1m0_sdo0 &i2s1m0_sdo1 + &i2s1m0_sdo2 &i2s1m0_sdo3>; + #sound-dai-cells = <0>; + status = "disabled"; + }; + ++ i2s2_2ch: i2s@fe420000 { ++ compatible = "rockchip,rk3568-i2s-tdm"; ++ reg = <0x0 0xfe420000 0x0 0x1000>; ++ interrupts = ; ++ assigned-clocks = <&cru CLK_I2S2_2CH_SRC>; ++ assigned-clock-rates = <1188000000>; ++ clocks = <&cru MCLK_I2S2_2CH>, <&cru MCLK_I2S2_2CH>, <&cru HCLK_I2S2_2CH>; ++ clock-names = "mclk_tx", "mclk_rx", "hclk"; ++ dmas = <&dmac1 4>, <&dmac1 5>; ++ dma-names = "tx", "rx"; ++ resets = <&cru SRST_M_I2S2_2CH>; ++ reset-names = "m"; ++ rockchip,grf = <&grf>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2s2m0_sclktx ++ &i2s2m0_lrcktx ++ &i2s2m0_sdi ++ &i2s2m0_sdo>; ++ #sound-dai-cells = <0>; ++ status = "disabled"; ++ }; ++ + i2s3_2ch: i2s@fe430000 { + compatible = "rockchip,rk3568-i2s-tdm"; + reg = <0x0 0xfe430000 0x0 0x1000>; + interrupts = ; + clocks = <&cru MCLK_I2S3_2CH_TX>, <&cru MCLK_I2S3_2CH_RX>, +@@ -1153,10 +1161,24 @@ &pdmm0_sdi2 + reset-names = "pdm-m"; + #sound-dai-cells = <0>; + status = "disabled"; + }; + ++ spdif: spdif@fe460000 { ++ compatible = "rockchip,rk3568-spdif"; ++ reg = <0x0 0xfe460000 0x0 0x1000>; ++ interrupts = ; ++ clock-names = "mclk", "hclk"; ++ clocks = <&cru MCLK_SPDIF_8CH>, <&cru HCLK_SPDIF_8CH>; ++ dmas = <&dmac1 1>; ++ dma-names = "tx"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spdifm0_tx>; ++ #sound-dai-cells = <0>; ++ status = "disabled"; ++ }; ++ + dmac0: dma-controller@fe530000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x0 0xfe530000 0x0 0x4000>; + interrupts = , + ; +-- diff --git a/patch/kernel/archive/rockchip64-6.3/board-radxa-e25-sdmmc0-fix.patch b/patch/kernel/archive/rockchip64-6.3/board-radxa-e25-sdmmc0-fix.patch new file mode 100644 index 0000000000..3a4cc9e966 --- /dev/null +++ b/patch/kernel/archive/rockchip64-6.3/board-radxa-e25-sdmmc0-fix.patch @@ -0,0 +1,16 @@ +diff --git a/arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts b/arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts +index 63c4bd873188..924857469afd 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts +@@ -184,11 +184,11 @@ &sdmmc0 { + cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; + /* Also used in pcie30x1_clkreqnm0 */ + disable-wp; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd>; +- sd-uhs-sdr104; ++ sd-uhs-sdr50; + vmmc-supply = <&vcc3v3_sd>; + vqmmc-supply = <&vccio_sd>; + status = "okay"; + }; diff --git a/patch/kernel/archive/rockchip64-6.3/board-radxa-e25-usb3-and-emmc-fix.patch b/patch/kernel/archive/rockchip64-6.3/board-radxa-e25-usb3-and-emmc-fix.patch new file mode 100644 index 0000000000..4c86ae0f9d --- /dev/null +++ b/patch/kernel/archive/rockchip64-6.3/board-radxa-e25-usb3-and-emmc-fix.patch @@ -0,0 +1,54 @@ +diff --git a/arch/arm64/boot/dts/rockchip/rk3568-radxa-cm3i.dtsi b/arch/arm64/boot/dts/rockchip/rk3568-radxa-cm3i.dtsi +index c50fbdd48680..b9d317cab48b 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3568-radxa-cm3i.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3568-radxa-cm3i.dtsi +@@ -390,10 +390,23 @@ &sdhci { + vmmc-supply = <&vcc_3v3>; + vqmmc-supply = <&vcc_1v8>; + status = "okay"; + }; + ++ ++ ++&sfc { ++ status = "okay"; ++ flash@0 { ++ compatible = "jedec,spi-nor"; ++ reg = <0>; ++ spi-max-frequency = <108000000>; ++ spi-rx-bus-width = <2>; ++ spi-tx-bus-width = <2>; ++ }; ++}; ++ + &tsadc { + rockchip,hw-tshut-mode = <1>; + rockchip,hw-tshut-polarity = <0>; + status = "okay"; + }; +@@ -410,6 +423,7 @@ &usb2phy1 { + status = "okay"; + }; + + &usb_host0_xhci { + extcon = <&usb2phy0>; ++ dr_mode = "host"; + }; +diff --git a/arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts b/arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts +index 924857469afd..38caecb1ef67 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts +@@ -199,10 +199,12 @@ &usb_host0_ehci { + &usb_host0_ohci { + status = "okay"; + }; + + &usb_host0_xhci { ++ extcon = <&usb2phy0>; ++ dr_mode = "host"; + status = "okay"; + }; + + &usb_host1_ehci { + status = "okay"; +--