From 42cc795f4d4ffed60f81fe64cbf96be39ae0783a Mon Sep 17 00:00:00 2001 From: Martin Schmiedel Date: Thu, 25 Jul 2024 09:38:23 +0200 Subject: [PATCH] MBa8MPxL: update imx8m-6.6 - linux-tqma-current.config: enable HDMI, LVDS, Bluetooth - imx8_common.inc: use tag instead of branch (v6.6.43) - fix asound.state.tqma Signed-off-by: Martin Schmiedel --- config/kernel/linux-tqma-current.config | 35 +- .../sources/families/include/imx8_common.inc | 2 +- packages/blobs/asound.state/asound.state.tqma | 568 ++++++++++++++++++ .../0001-Add-HDMI-support-for-IMX8MP.patch | 69 ++- ...mp-Enable-HDMI-on-TQMa8MPxL-MBa8MPxL.patch | 2 +- ...scale-add-TQMa8MPQL-on-MBa8MP-RAS314.patch | 488 ++++++++++----- ...-Enable-HDMI-on-TQMa8MPxL-MBa8MP-RAS.patch | 42 -- ...-support-for-TQMa8MPxL-MBa8MP-RAS314.patch | 101 ---- 8 files changed, 985 insertions(+), 322 deletions(-) delete mode 100644 patch/kernel/archive/imx8m-6.6/0004-arm64-dts-imx8mp-Enable-HDMI-on-TQMa8MPxL-MBa8MP-RAS.patch delete mode 100644 patch/kernel/archive/imx8m-6.6/0005-Add-wifi-support-for-TQMa8MPxL-MBa8MP-RAS314.patch diff --git a/config/kernel/linux-tqma-current.config b/config/kernel/linux-tqma-current.config index f640470c9d..0743faf4e4 100644 --- a/config/kernel/linux-tqma-current.config +++ b/config/kernel/linux-tqma-current.config @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/arm64 6.6.32 Kernel Configuration +# Linux/arm64 6.6.43 Kernel Configuration # CONFIG_CC_VERSION_TEXT="aarch64-linux-gnu-gcc (Ubuntu 11.4.0-1ubuntu1~22.04) 11.4.0" CONFIG_CC_IS_GCC=y @@ -1535,7 +1535,7 @@ CONFIG_BT_MRVL_SDIO=m # CONFIG_BT_MTKSDIO is not set # CONFIG_BT_MTKUART is not set # CONFIG_BT_VIRTIO is not set -# CONFIG_BT_NXPUART is not set +CONFIG_BT_NXPUART=m # end of Bluetooth device drivers # CONFIG_AF_RXRPC is not set @@ -3052,6 +3052,7 @@ CONFIG_WLCORE_SDIO=m # CONFIG_RTL8821CU is not set # CONFIG_88XXAU is not set # CONFIG_RTL8192EU is not set +# CONFIG_RTL8189FS is not set # CONFIG_RTL8189ES is not set CONFIG_WLAN_VENDOR_ZYDAS=y # CONFIG_USB_ZD1201 is not set @@ -4356,12 +4357,18 @@ CONFIG_RC_DEVICES=y # CONFIG_RC_LOOPBACK is not set # CONFIG_RC_XBOX_DVD is not set CONFIG_CEC_CORE=m +CONFIG_CEC_NOTIFIER=y # # CEC support # # CONFIG_MEDIA_CEC_RC is not set -# CONFIG_MEDIA_CEC_SUPPORT is not set +CONFIG_MEDIA_CEC_SUPPORT=y +# CONFIG_CEC_CH7322 is not set +# CONFIG_CEC_CROS_EC is not set +# CONFIG_CEC_GPIO is not set +# CONFIG_USB_PULSE8_CEC is not set +# CONFIG_USB_RAINSHADOW_CEC is not set # end of CEC support CONFIG_MEDIA_SUPPORT=m @@ -5048,8 +5055,9 @@ CONFIG_DRM_DP_AUX_BUS=m CONFIG_DRM_DISPLAY_HELPER=m CONFIG_DRM_DISPLAY_DP_HELPER=y CONFIG_DRM_DISPLAY_HDCP_HELPER=y +CONFIG_DRM_DISPLAY_HDMI_HELPER=y # CONFIG_DRM_DP_AUX_CHARDEV is not set -# CONFIG_DRM_DP_CEC is not set +CONFIG_DRM_DP_CEC=y CONFIG_DRM_GEM_DMA_HELPER=m CONFIG_DRM_SCHED=m @@ -5182,8 +5190,8 @@ CONFIG_DRM_PANEL_BRIDGE=y # CONFIG_DRM_CHIPONE_ICN6211 is not set # CONFIG_DRM_CHRONTEL_CH7033 is not set # CONFIG_DRM_CROS_EC_ANX7688 is not set -# CONFIG_DRM_DISPLAY_CONNECTOR is not set -# CONFIG_DRM_FSL_LDB is not set +CONFIG_DRM_DISPLAY_CONNECTOR=m +CONFIG_DRM_FSL_LDB=m # CONFIG_DRM_ITE_IT6505 is not set CONFIG_DRM_LONTIUM_LT8912B=m # CONFIG_DRM_LONTIUM_LT9211 is not set @@ -5225,8 +5233,13 @@ CONFIG_DRM_CDNS_MHDP8546=m # CONFIG_DRM_IMX8QXP_PIXEL_COMBINER is not set # CONFIG_DRM_IMX8QXP_PIXEL_LINK is not set # CONFIG_DRM_IMX8QXP_PIXEL_LINK_TO_DPI is not set -# CONFIG_DRM_IMX8MP_DW_HDMI_BRIDGE is not set -# CONFIG_DRM_IMX8MP_HDMI_PVI is not set +CONFIG_DRM_IMX8MP_DW_HDMI_BRIDGE=m +CONFIG_DRM_IMX8MP_HDMI_PVI=m +CONFIG_DRM_DW_HDMI=m +# CONFIG_DRM_DW_HDMI_AHB_AUDIO is not set +# CONFIG_DRM_DW_HDMI_I2S_AUDIO is not set +# CONFIG_DRM_DW_HDMI_GP_AUDIO is not set +CONFIG_DRM_DW_HDMI_CEC=m # end of Display Interface Bridges CONFIG_DRM_IMX_DCSS=m @@ -5322,6 +5335,7 @@ CONFIG_FB_SYS_IMAGEBLIT=y CONFIG_FB_SYS_FOPS=y CONFIG_FB_DEFERRED_IO=y CONFIG_FB_DMAMEM_HELPERS=y +CONFIG_FB_IOMEM_FOPS=y CONFIG_FB_IOMEM_HELPERS=y CONFIG_FB_SYSMEM_HELPERS=y CONFIG_FB_SYSMEM_HELPERS_DEFERRED=y @@ -7139,6 +7153,7 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_AD7923 is not set # CONFIG_AD7949 is not set # CONFIG_AD799X is not set +# CONFIG_AD9467 is not set # CONFIG_ADI_AXI_ADC is not set # CONFIG_AXP20X_ADC is not set # CONFIG_AXP288_ADC is not set @@ -7678,7 +7693,7 @@ CONFIG_PHY_FSL_IMX8MQ_USB=y # CONFIG_PHY_MIXEL_LVDS_PHY is not set CONFIG_PHY_MIXEL_MIPI_DPHY=m CONFIG_PHY_FSL_IMX8M_PCIE=y -# CONFIG_PHY_FSL_SAMSUNG_HDMI_PHY is not set +CONFIG_PHY_FSL_SAMSUNG_HDMI_PHY=m # CONFIG_PHY_FSL_LYNX_28G is not set # CONFIG_PHY_PXA_28NM_HSIC is not set # CONFIG_PHY_PXA_28NM_USB2 is not set @@ -8137,6 +8152,7 @@ CONFIG_CRYPTO_ALGAPI=y CONFIG_CRYPTO_ALGAPI2=y CONFIG_CRYPTO_AEAD=y CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_SIG=y CONFIG_CRYPTO_SIG2=y CONFIG_CRYPTO_SKCIPHER=y CONFIG_CRYPTO_SKCIPHER2=y @@ -8524,7 +8540,6 @@ CONFIG_CMA_ALIGNMENT=8 # CONFIG_DMA_API_DEBUG is not set # CONFIG_DMA_MAP_BENCHMARK is not set CONFIG_SGL_ALLOC=y -# CONFIG_FORCE_NR_CPUS is not set CONFIG_CPU_RMAP=y CONFIG_DQL=y CONFIG_GLOB=y diff --git a/config/sources/families/include/imx8_common.inc b/config/sources/families/include/imx8_common.inc index 697c5a63be..e9fbbd5a70 100644 --- a/config/sources/families/include/imx8_common.inc +++ b/config/sources/families/include/imx8_common.inc @@ -27,7 +27,7 @@ case $BOARD in current) # active lts mainline kernel KERNEL_MAJOR_MINOR="6.6" - KERNELBRANCH='branch:linux-6.6.y' + KERNELBRANCH='tag:v6.6.43' KERNELPATCHDIR="archive/imx8m-6.6" ;; diff --git a/packages/blobs/asound.state/asound.state.tqma b/packages/blobs/asound.state/asound.state.tqma index 078941a93e..0eea04121a 100644 --- a/packages/blobs/asound.state/asound.state.tqma +++ b/packages/blobs/asound.state/asound.state.tqma @@ -1222,3 +1222,571 @@ state.tqtlv320aic32x { } } } +state.tqmba8mpras314 { + control.1 { + iface MIXER + name 'PCM Playback Volume' + value.0 87 + value.1 87 + comment { + access 'read write' + type INTEGER + count 2 + range '0 - 175' + dbmin -6350 + dbmax 2400 + dbvalue.0 -2000 + dbvalue.1 -2000 + } + } + control.2 { + iface MIXER + name 'DAC Left Playback PowerTune Switch' + value P3 + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 P3 + item.1 P2 + item.2 P1 + } + } + control.3 { + iface MIXER + name 'DAC Right Playback PowerTune Switch' + value P3 + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 P3 + item.1 P2 + item.2 P1 + } + } + control.4 { + iface MIXER + name 'HP Driver Gain Volume' + value.0 32 + value.1 32 + comment { + access 'read write' + type INTEGER + count 2 + range '0 - 35' + dbmin -600 + dbmax 2900 + dbvalue.0 2600 + dbvalue.1 2600 + } + } + control.5 { + iface MIXER + name 'LO Driver Gain Volume' + value.0 6 + value.1 6 + comment { + access 'read write' + type INTEGER + count 2 + range '0 - 35' + dbmin -600 + dbmax 2900 + dbvalue.0 0 + dbvalue.1 0 + } + } + control.6 { + iface MIXER + name 'HP DAC Playback Switch' + value.0 true + value.1 true + comment { + access 'read write' + type BOOLEAN + count 2 + } + } + control.7 { + iface MIXER + name 'LO DAC Playback Switch' + value.0 false + value.1 false + comment { + access 'read write' + type BOOLEAN + count 2 + } + } + control.8 { + iface MIXER + name 'LO Playback Common Mode Switch' + value 'Full Chip' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 'Full Chip' + item.1 '1.65V' + } + } + control.9 { + iface MIXER + name 'Mic PGA Switch' + value.0 false + value.1 false + comment { + access 'read write' + type BOOLEAN + count 2 + } + } + control.10 { + iface MIXER + name 'ADCFGA Left Mute Switch' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.11 { + iface MIXER + name 'ADCFGA Right Mute Switch' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.12 { + iface MIXER + name 'ADC Level Volume' + value.0 24 + value.1 24 + comment { + access 'read write' + type INTEGER + count 2 + range '0 - 64' + dbmin -1200 + dbmax 2000 + dbvalue.0 0 + dbvalue.1 0 + } + } + control.13 { + iface MIXER + name 'PGA Level Volume' + value.0 0 + value.1 0 + comment { + access 'read write' + type INTEGER + count 2 + range '0 - 95' + dbmin 0 + dbmax 4750 + dbvalue.0 0 + dbvalue.1 0 + } + } + control.14 { + iface MIXER + name 'Auto-mute Switch' + value 0 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 7' + } + } + control.15 { + iface MIXER + name 'AGC Left Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.16 { + iface MIXER + name 'AGC Right Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.17 { + iface MIXER + name 'AGC Target Level' + value.0 0 + value.1 0 + comment { + access 'read write' + type INTEGER + count 2 + range '0 - 7' + } + } + control.18 { + iface MIXER + name 'AGC Gain Hysteresis' + value.0 0 + value.1 0 + comment { + access 'read write' + type INTEGER + count 2 + range '0 - 3' + } + } + control.19 { + iface MIXER + name 'AGC Hysteresis' + value.0 0 + value.1 0 + comment { + access 'read write' + type INTEGER + count 2 + range '0 - 3' + } + } + control.20 { + iface MIXER + name 'AGC Noise Threshold' + value.0 0 + value.1 0 + comment { + access 'read write' + type INTEGER + count 2 + range '0 - 31' + } + } + control.21 { + iface MIXER + name 'AGC Max PGA' + value.0 127 + value.1 127 + comment { + access 'read write' + type INTEGER + count 2 + range '0 - 127' + } + } + control.22 { + iface MIXER + name 'AGC Attack Time' + value.0 0 + value.1 0 + comment { + access 'read write' + type INTEGER + count 2 + range '0 - 31' + } + } + control.23 { + iface MIXER + name 'AGC Decay Time' + value.0 0 + value.1 0 + comment { + access 'read write' + type INTEGER + count 2 + range '0 - 31' + } + } + control.24 { + iface MIXER + name 'AGC Noise Debounce' + value.0 0 + value.1 0 + comment { + access 'read write' + type INTEGER + count 2 + range '0 - 31' + } + } + control.25 { + iface MIXER + name 'AGC Signal Debounce' + value.0 0 + value.1 0 + comment { + access 'read write' + type INTEGER + count 2 + range '0 - 15' + } + } + control.26 { + iface MIXER + name 'HPL Output Mixer L_DAC Switch' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.27 { + iface MIXER + name 'HPL Output Mixer IN1_L Switch' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.28 { + iface MIXER + name 'LOL Output Mixer L_DAC Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.29 { + iface MIXER + name 'HPR Output Mixer R_DAC Switch' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.30 { + iface MIXER + name 'HPR Output Mixer IN1_R Switch' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.31 { + iface MIXER + name 'LOR Output Mixer R_DAC Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.32 { + iface MIXER + name 'IN1_R to Right Mixer Positive Resistor' + value Off + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 Off + item.1 '10 kOhm' + item.2 '20 kOhm' + item.3 '40 kOhm' + } + } + control.33 { + iface MIXER + name 'IN2_R to Right Mixer Positive Resistor' + value Off + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 Off + item.1 '10 kOhm' + item.2 '20 kOhm' + item.3 '40 kOhm' + } + } + control.34 { + iface MIXER + name 'IN3_R to Right Mixer Positive Resistor' + value Off + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 Off + item.1 '10 kOhm' + item.2 '20 kOhm' + item.3 '40 kOhm' + } + } + control.35 { + iface MIXER + name 'IN2_L to Right Mixer Positive Resistor' + value Off + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 Off + item.1 '10 kOhm' + item.2 '20 kOhm' + item.3 '40 kOhm' + } + } + control.36 { + iface MIXER + name 'CM_R to Right Mixer Negative Resistor' + value '10 kOhm' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 Off + item.1 '10 kOhm' + item.2 '20 kOhm' + item.3 '40 kOhm' + } + } + control.37 { + iface MIXER + name 'IN1_L to Right Mixer Negative Resistor' + value Off + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 Off + item.1 '10 kOhm' + item.2 '20 kOhm' + item.3 '40 kOhm' + } + } + control.38 { + iface MIXER + name 'IN3_L to Right Mixer Negative Resistor' + value Off + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 Off + item.1 '10 kOhm' + item.2 '20 kOhm' + item.3 '40 kOhm' + } + } + control.39 { + iface MIXER + name 'IN1_L to Left Mixer Positive Resistor' + value Off + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 Off + item.1 '10 kOhm' + item.2 '20 kOhm' + item.3 '40 kOhm' + } + } + control.40 { + iface MIXER + name 'IN2_L to Left Mixer Positive Resistor' + value Off + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 Off + item.1 '10 kOhm' + item.2 '20 kOhm' + item.3 '40 kOhm' + } + } + control.41 { + iface MIXER + name 'IN3_L to Left Mixer Positive Resistor' + value Off + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 Off + item.1 '10 kOhm' + item.2 '20 kOhm' + item.3 '40 kOhm' + } + } + control.42 { + iface MIXER + name 'IN1_R to Left Mixer Positive Resistor' + value Off + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 Off + item.1 '10 kOhm' + item.2 '20 kOhm' + item.3 '40 kOhm' + } + } + control.43 { + iface MIXER + name 'CM_L to Left Mixer Negative Resistor' + value '10 kOhm' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 Off + item.1 '10 kOhm' + item.2 '20 kOhm' + item.3 '40 kOhm' + } + } + control.44 { + iface MIXER + name 'IN2_R to Left Mixer Negative Resistor' + value Off + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 Off + item.1 '10 kOhm' + item.2 '20 kOhm' + item.3 '40 kOhm' + } + } + control.45 { + iface MIXER + name 'IN3_R to Left Mixer Negative Resistor' + value Off + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 Off + item.1 '10 kOhm' + item.2 '20 kOhm' + item.3 '40 kOhm' + } + } +} diff --git a/patch/kernel/archive/imx8m-6.6/0001-Add-HDMI-support-for-IMX8MP.patch b/patch/kernel/archive/imx8m-6.6/0001-Add-HDMI-support-for-IMX8MP.patch index 13e9142742..ce6e9e34f2 100644 --- a/patch/kernel/archive/imx8m-6.6/0001-Add-HDMI-support-for-IMX8MP.patch +++ b/patch/kernel/archive/imx8m-6.6/0001-Add-HDMI-support-for-IMX8MP.patch @@ -1,4 +1,4 @@ -From 3e31c704f76a785b87ddd9e99f975dbc9e100de7 Mon Sep 17 00:00:00 2001 +From 9caf66a8fc59ab89bfbfd9bb704d56c1d79d7dfd Mon Sep 17 00:00:00 2001 From: Martin Schmiedel Date: Wed, 10 Jan 2024 13:10:39 +0100 Subject: [PATCH] Add HDMI support for IMX8MP @@ -12,7 +12,7 @@ Signed-off-by: Martin Schmiedel .../bindings/display/imx/fsl,imx8mp-hdmi.yaml | 69 ++ .../bindings/phy/fsl,imx8mp-hdmi-phy.yaml | 62 + arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 27 + - arch/arm64/boot/dts/freescale/imx8mp.dtsi | 133 ++ + arch/arm64/boot/dts/freescale/imx8mp.dtsi | 134 ++ drivers/gpu/drm/bridge/imx/Kconfig | 16 + drivers/gpu/drm/bridge/imx/Makefile | 3 + drivers/gpu/drm/bridge/imx/imx8mp-hdmi-pvi.c | 202 +++ @@ -20,7 +20,7 @@ Signed-off-by: Martin Schmiedel drivers/phy/freescale/Kconfig | 6 + drivers/phy/freescale/Makefile | 1 + drivers/phy/freescale/phy-fsl-samsung-hdmi.c | 1078 +++++++++++++++++ - 12 files changed, 1816 insertions(+) + 12 files changed, 1817 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi-pvi.yaml create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi.yaml create mode 100644 Documentation/devicetree/bindings/phy/fsl,imx8mp-hdmi-phy.yaml @@ -257,10 +257,10 @@ index 000000000000..bc21c073e92a + #phy-cells = <0>; + }; diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts -index cc9d468b43ab..e20e0a0d99fd 100644 +index 92f8cc05fe9d..2b0899daa8fe 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts -@@ -299,6 +299,20 @@ &flexcan2 { +@@ -306,6 +306,20 @@ &flexcan2 { status = "disabled";/* can2 pin conflict with pdm */ }; @@ -281,7 +281,7 @@ index cc9d468b43ab..e20e0a0d99fd 100644 &i2c1 { clock-frequency = <400000>; pinctrl-names = "default"; -@@ -509,6 +523,10 @@ dsi_out: endpoint { +@@ -518,6 +532,10 @@ dsi_out: endpoint { }; }; @@ -292,7 +292,7 @@ index cc9d468b43ab..e20e0a0d99fd 100644 &pcie_phy { fsl,refclk-pad-mode = ; clocks = <&pcie0_refclk>; -@@ -718,6 +736,15 @@ MX8MP_IOMUXC_NAND_READY_B__GPIO3_IO16 0x140 +@@ -727,6 +745,15 @@ MX8MP_IOMUXC_NAND_READY_B__GPIO3_IO16 0x140 >; }; @@ -309,13 +309,59 @@ index cc9d468b43ab..e20e0a0d99fd 100644 fsl,pins = < MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c2 diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi -index 4b50920ac204..b00b4cced57c 100644 +index 4b50920ac204..7b942c9e83bf 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi -@@ -1831,6 +1848,102 @@ hsio_blk_ctrl: blk-ctrl@32f10000 { +@@ -832,6 +832,23 @@ pgc_mediamix: power-domain@10 { + <&clk IMX8MP_CLK_MEDIA_APB_ROOT>; + }; + ++ pgc_hdmimix: power-domain@14 { ++ #power-domain-cells = <0>; ++ reg = ; ++ clocks = <&clk IMX8MP_CLK_HDMI_ROOT>, ++ <&clk IMX8MP_CLK_HDMI_APB>; ++ assigned-clocks = <&clk IMX8MP_CLK_HDMI_AXI>, ++ <&clk IMX8MP_CLK_HDMI_APB>; ++ assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>, ++ <&clk IMX8MP_SYS_PLL1_133M>; ++ assigned-clock-rates = <500000000>, <133000000>; ++ }; ++ ++ pgc_hdmi_phy: power-domain@15 { ++ #power-domain-cells = <0>; ++ reg = ; ++ }; ++ + pgc_mipi_phy2: power-domain@16 { + #power-domain-cells = <0>; + reg = ; +@@ -1830,6 +1847,123 @@ hsio_blk_ctrl: blk-ctrl@32f10000 { + interconnect-names = "noc-pcie", "usb1", "usb2", "pcie"; #power-domain-cells = <1>; #clock-cells = <0>; - }; ++ }; ++ ++ hdmi_blk_ctrl: blk-ctrl@32fc0000 { ++ compatible = "fsl,imx8mp-hdmi-blk-ctrl", "syscon"; ++ reg = <0x32fc0000 0x1000>; ++ clocks = <&clk IMX8MP_CLK_HDMI_APB>, ++ <&clk IMX8MP_CLK_HDMI_ROOT>, ++ <&clk IMX8MP_CLK_HDMI_REF_266M>, ++ <&clk IMX8MP_CLK_HDMI_24M>, ++ <&clk IMX8MP_CLK_HDMI_FDCC_TST>; ++ clock-names = "apb", "axi", "ref_266m", "ref_24m", "fdcc"; ++ power-domains = <&pgc_hdmimix>, <&pgc_hdmimix>, ++ <&pgc_hdmimix>, <&pgc_hdmimix>, ++ <&pgc_hdmimix>, <&pgc_hdmimix>, ++ <&pgc_hdmimix>, <&pgc_hdmi_phy>, ++ <&pgc_hdmimix>, <&pgc_hdmimix>; ++ power-domain-names = "bus", "irqsteer", "lcdif", ++ "pai", "pvi", "trng", ++ "hdmi-tx", "hdmi-tx-phy", ++ "hdcp", "hrv"; ++ #power-domain-cells = <1>; ++ }; + + irqsteer_hdmi: interrupt-controller@32fc2000 { + compatible = "fsl,imx-irqsteer"; @@ -411,10 +457,9 @@ index 4b50920ac204..b00b4cced57c 100644 + #clock-cells = <0>; + #phy-cells = <0>; + status = "disabled"; -+ }; + }; }; - pcie: pcie@33800000 { diff --git a/drivers/gpu/drm/bridge/imx/Kconfig b/drivers/gpu/drm/bridge/imx/Kconfig index 9fae28db6aa7..b1f4d962b2af 100644 --- a/drivers/gpu/drm/bridge/imx/Kconfig diff --git a/patch/kernel/archive/imx8m-6.6/0002-arm64-dts-imx8mp-Enable-HDMI-on-TQMa8MPxL-MBa8MPxL.patch b/patch/kernel/archive/imx8m-6.6/0002-arm64-dts-imx8mp-Enable-HDMI-on-TQMa8MPxL-MBa8MPxL.patch index e1d66b25e3..925e54c19f 100644 --- a/patch/kernel/archive/imx8m-6.6/0002-arm64-dts-imx8mp-Enable-HDMI-on-TQMa8MPxL-MBa8MPxL.patch +++ b/patch/kernel/archive/imx8m-6.6/0002-arm64-dts-imx8mp-Enable-HDMI-on-TQMa8MPxL-MBa8MPxL.patch @@ -1,4 +1,4 @@ -From dcc32da30daff18b4e72c9663252f17f39d819eb Mon Sep 17 00:00:00 2001 +From aeaa5cc44382576cd30432d5ec9718fbb953dd28 Mon Sep 17 00:00:00 2001 From: Martin Schmiedel Date: Wed, 10 Jan 2024 14:32:45 +0100 Subject: [PATCH] arm64: dts: imx8mp: Enable HDMI on TQMa8MPxL/MBa8MPxL diff --git a/patch/kernel/archive/imx8m-6.6/0003-arm64-dts-freescale-add-TQMa8MPQL-on-MBa8MP-RAS314.patch b/patch/kernel/archive/imx8m-6.6/0003-arm64-dts-freescale-add-TQMa8MPQL-on-MBa8MP-RAS314.patch index fadaa3088e..ae1de7fd53 100644 --- a/patch/kernel/archive/imx8m-6.6/0003-arm64-dts-freescale-add-TQMa8MPQL-on-MBa8MP-RAS314.patch +++ b/patch/kernel/archive/imx8m-6.6/0003-arm64-dts-freescale-add-TQMa8MPQL-on-MBa8MP-RAS314.patch @@ -1,6 +1,6 @@ -From de6c467b764ac5cd739a2072c1209029fe615a1d Mon Sep 17 00:00:00 2001 +From b7b5ca128562c0d223d7c96df554ffc44bdc1717 Mon Sep 17 00:00:00 2001 From: Martin Schmiedel -Date: Wed, 10 Jan 2024 13:16:31 +0100 +Date: Thu, 1 Aug 2024 10:11:51 +0200 Subject: [PATCH] arm64: dts: freescale: add TQMa8MPQL on MBa8MP-RAS314 This adds support for TQMa8MPQL module on MBa8MP-RAS314 board. @@ -8,8 +8,8 @@ This adds support for TQMa8MPQL module on MBa8MP-RAS314 board. Signed-off-by: Martin Schmiedel --- arch/arm64/boot/dts/freescale/Makefile | 1 + - .../imx8mp-tqma8mpql-mba8mp-ras314.dts | 728 ++++++++++++++++++ - 2 files changed, 729 insertions(+) + .../imx8mp-tqma8mpql-mba8mp-ras314.dts | 906 ++++++++++++++++++ + 2 files changed, 907 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314.dts diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile @@ -26,14 +26,16 @@ index 89aee6c92576..8ebaf3aa9ad7 100644 dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw73xx-2x.dtb diff --git a/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314.dts b/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314.dts new file mode 100644 -index 000000000000..b7c45d0a3bcd +index 000000000000..d7fd9d36f824 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314.dts -@@ -0,0 +1,728 @@ +@@ -0,0 +1,906 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* -+ * Copyright 2021-2022 TQ-Systems GmbH -+ * Author: Alexander Stein ++ * Copyright (c) 2023-2024 TQ-Systems GmbH , ++ * D-82229 Seefeld, Germany. ++ * Author: Martin Schmiedel ++ * Author: Alexander Stein + */ + +/dts-v1/; @@ -47,6 +49,7 @@ index 000000000000..b7c45d0a3bcd +/ { + model = "TQ-Systems i.MX8MPlus TQMa8MPxL on MBa8MP-RAS314"; + compatible = "tq,imx8mp-tqma8mpql-mba8mp-ras314", "tq,imx8mp-tqma8mpql", "fsl,imx8mp"; ++ chassis-type = "embedded"; + + chosen { + stdout-path = &uart4; @@ -60,6 +63,33 @@ index 000000000000..b7c45d0a3bcd + rtc1 = &snvs_rtc; + }; + ++ /* X8 */ ++ backlight_lvds: backlight { ++ compatible = "pwm-backlight"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_backlight>; ++ pwms = <&pwm2 0 5000000 0>; ++ brightness-levels = <0 4 8 16 32 64 128 255>; ++ default-brightness-level = <7>; ++ power-supply = <®_vcc_12v0>; ++ enable-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; ++ status = "disabled"; ++ }; ++ ++ /* X7 + X8 */ ++ display: display { ++ /* ++ * Display is not fixed, so compatible has to be added from ++ * DT overlay ++ */ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_lvdsdisplay>; ++ power-supply = <®_vcc_3v3>; ++ enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; ++ backlight = <&backlight_lvds>; ++ status = "disabled"; ++ }; ++ + gpio-leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; @@ -67,15 +97,31 @@ index 000000000000..b7c45d0a3bcd + + led-1 { + color = ; ++ function = LED_FUNCTION_STATUS; ++ function-enumerator = <0>; + gpios = <&gpio4 18 GPIO_ACTIVE_HIGH>; + }; + + led-2 { + color = ; ++ function = LED_FUNCTION_STATUS; ++ function-enumerator = <1>; + gpios = <&gpio4 19 GPIO_ACTIVE_HIGH>; + }; + }; + ++ hdmi-connector { ++ compatible = "hdmi-connector"; ++ label = "X9"; ++ type = "a"; ++ ++ port { ++ hdmi_connector_in: endpoint { ++ remote-endpoint = <&hdmi_tx_out>; ++ }; ++ }; ++ }; ++ + reg_usdhc2_vmmc: regulator-usdhc2 { + compatible = "regulator-fixed"; + pinctrl-names = "default"; @@ -91,28 +137,30 @@ index 000000000000..b7c45d0a3bcd + + reg_vcc_3v3: regulator-3v3 { + compatible = "regulator-fixed"; -+ regulator-name = "VCC_3V3"; ++ regulator-name = "V_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + reg_vcc_5v0: regulator-5v0 { + compatible = "regulator-fixed"; -+ regulator-name = "VCC_5V0"; ++ regulator-name = "V_5V0"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + ++ reg_vcc_12v0: regulator-12v0 { ++ compatible = "regulator-fixed"; ++ regulator-name = "V_12V"; ++ regulator-min-microvolt = <12000000>; ++ regulator-max-microvolt = <12000000>; ++ }; ++ + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + -+ ocram: ocram@900000 { -+ no-map; -+ reg = <0 0x900000 0 0x70000>; -+ }; -+ + /* global autoconfigured region for contiguous allocations */ + linux,cma { + compatible = "shared-dma-pool"; @@ -123,63 +171,38 @@ index 000000000000..b7c45d0a3bcd + }; + }; + ++ rfkill { ++ compatible = "rfkill-gpio"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_rfkill>; ++ label = "rfkill-pcie-wlan"; ++ radio-type = "wlan"; ++ shutdown-gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>; ++ }; ++ + sound { + compatible = "fsl,imx-audio-tlv320aic32x4"; -+ model = "tq-tlv320aic32x"; ++ model = "tq-mba8mp-ras314"; + audio-cpu = <&sai5>; + audio-codec = <&tlv320aic3x04>; + audio-routing = + "IN3_L", "Mic Jack", + "Mic Jack", "Mic Bias", -+ "IN1_L", "Line In Jack", -+ "IN1_R", "Line In Jack", -+ "Line Out Jack", "LOL", -+ "Line Out Jack", "LOR"; -+ -+ }; -+ -+ thermal-zones { -+ soc-thermal { -+ trips { -+ soc_active0: trip-active0 { -+ temperature = <40000>; -+ hysteresis = <5000>; -+ type = "active"; -+ }; -+ -+ soc_active1: trip-active1 { -+ temperature = <48000>; -+ hysteresis = <3000>; -+ type = "active"; -+ }; -+ -+ soc_active2: trip-active2 { -+ temperature = <60000>; -+ hysteresis = <10000>; -+ type = "active"; -+ }; -+ }; -+ }; ++ "Headphone Jack", "HPL", ++ "Headphone Jack", "HPR"; + }; +}; + +&ecspi3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi3>; -+ cs-gpios = <&gpio5 25 GPIO_ACTIVE_LOW>; ++ cs-gpios = <&gpio5 25 GPIO_ACTIVE_LOW>, <&gpio1 6 GPIO_ACTIVE_LOW>; + status = "okay"; -+ -+ spidev@0 { -+ reg = <0>; /* Chip Select 0 */ -+ compatible = "rohm,dh2228fv"; -+ spi-max-frequency = <1000000>; -+ status = "okay"; -+ }; +}; + +&eqos { + pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_eqos>, <&pinctrl_eqos_phy>; ++ pinctrl-0 = <&pinctrl_eqos>; + phy-mode = "rgmii-id"; + phy-handle = <ðphy3>; + status = "okay"; @@ -192,24 +215,26 @@ index 000000000000..b7c45d0a3bcd + ethphy3: ethernet-phy@3 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <3>; -+ ti,rx-internal-delay = ; -+ ti,tx-internal-delay = ; -+ ti,fifo-depth = ; -+ ti,dp83867-rxctrl-strap-quirk; -+ ti,clk-output-sel = ; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_eqos_phy>; + reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>; + reset-assert-us = <500000>; + reset-deassert-us = <50000>; + enet-phy-lane-no-swap; + interrupt-parent = <&gpio4>; + interrupts = <3 IRQ_TYPE_EDGE_FALLING>; ++ ti,rx-internal-delay = ; ++ ti,tx-internal-delay = ; ++ ti,fifo-depth = ; ++ ti,dp83867-rxctrl-strap-quirk; ++ ti,clk-output-sel = ; + }; + }; +}; + +&fec { + pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_fec>, <&pinctrl_fec_phy>; ++ pinctrl-0 = <&pinctrl_fec>; + phy-mode = "rgmii-id"; + phy-handle = <ðphy0>; + fsl,magic-packet; @@ -222,17 +247,19 @@ index 000000000000..b7c45d0a3bcd + ethphy0: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0>; -+ ti,rx-internal-delay = ; -+ ti,tx-internal-delay = ; -+ ti,fifo-depth = ; -+ ti,dp83867-rxctrl-strap-quirk; -+ ti,clk-output-sel = ; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_fec_phy>; + reset-gpios = <&gpio4 0 GPIO_ACTIVE_LOW>; + reset-assert-us = <500000>; + reset-deassert-us = <50000>; + enet-phy-lane-no-swap; + interrupt-parent = <&gpio4>; + interrupts = <1 IRQ_TYPE_EDGE_FALLING>; ++ ti,rx-internal-delay = ; ++ ti,tx-internal-delay = ; ++ ti,fifo-depth = ; ++ ti,dp83867-rxctrl-strap-quirk; ++ ti,clk-output-sel = ; + }; + }; +}; @@ -241,24 +268,31 @@ index 000000000000..b7c45d0a3bcd + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio1>; + -+ gpio-line-names = "WIFI_PMIC_EN", "LVDS_RESET#", "", "LVDS_BLT_EN", -+ "", "", "", "LVDS_PWR_EN", -+ "PMIC_IRQ", "", "", "", ++ gpio-line-names = "WIFI_PMIC_EN", "LVDS_RESET#", "", "", ++ "", "", "GPIO8", "", + "", "", "", "", ++ "", "", "GPIO12", "GPIO13", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", ""; ++ ++ wifi-pmic-en-hog { ++ gpio-hog; ++ gpios = <0 0>; ++ output-high; ++ line-name = "WIFI_PMIC_EN"; ++ }; +}; + +&gpio2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio2>; + -+ gpio-line-names = "", "", "", "", -+ "", "", "CAM_GPIO1", "CAM_GPIO2", ++ gpio-line-names = "GPIO22", "GPIO23", "GPIO24", "GPIO25", ++ "GPIO26", "GPIO27", "CAM_GPIO1", "CAM_GPIO2", ++ "", "", "GPIO1", "GPIO0", + "", "", "", "", -+ "USDHC2_CD", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", @@ -273,7 +307,7 @@ index 000000000000..b7c45d0a3bcd + "", "", "", "", + "", "", "", "", + "", "", "", "", -+ "", "", "", "RTC_EVENT#", ++ "", "", "", "", + "TEMP_EVENT#", "", "", "", + "", "", "", "", + "", "", "", ""; @@ -283,30 +317,79 @@ index 000000000000..b7c45d0a3bcd + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio4>; + -+ gpio-line-names = "ENET0_RST#", "ENET0_INT#", "ENET1_RST#", "ENET1_INT#", ++ gpio-line-names = "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", -+ "", "", "USER_LED1", "USER_LED2", -+ "HDMI_OC#", "", "", "", -+ "", "", "GPIO19", "GPIO20", -+ "", "", "", ""; ++ "", "", "", "", ++ "HDMI_OC#", "GPIO14", "GPIO15", "GPIO16", ++ "GPIO17", "PCIE_WAKE#", "GPIO19", "GPIO20", ++ "PCIE_PERST#", "", "", ""; ++ ++ pewake-hog { ++ gpio-hog; ++ gpios = <25 0>; ++ input; ++ line-name = "PCIE_WAKE#"; ++ }; +}; + +&gpio5 { + pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_gpio5>; ++ pinctrl-0 = <&pinctrl_gpio5>, <&pinctrl_gpt1_gpio>, ++ <&pinctrl_gpt2_gpio>, <&pinctrl_gpt3_gpio>; + -+ gpio-line-names = "", "GPIO18", "", "", -+ "", "", "", "", -+ "", "", "GPIO21", "CODEC_RST#", ++ gpio-line-names = "", "GPIO18", "", "GPIO3", ++ "GPIO2", "GPIO21", "", "", + "", "", "", "", + "", "", "", "", -+ "", "", "", "", -+ "", "ECSPI3_SS0", "USB_HUB_RST#", "", ++ "", "", "GPIO5", "GPIO6", ++ "", "", "GPIO11", "GPIO10", ++ "GPIO9", "GPIO7", "", "GPIO4", + "", "", "", ""; +}; + ++&gpt1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_gpt1>; ++ status = "disabled"; ++}; ++ ++&gpt2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_gpt2>; ++ status = "disabled"; ++}; ++ ++&gpt3 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_gpt3>; ++ status = "disabled"; ++}; ++ ++&hdmi_pvi { ++ status = "okay"; ++}; ++ ++&hdmi_tx { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_hdmi>; ++ status = "okay"; ++ ++ ports { ++ port@1 { ++ hdmi_tx_out: endpoint { ++ remote-endpoint = <&hdmi_connector_in>; ++ }; ++ }; ++ }; ++}; ++ ++&hdmi_tx_phy { ++ status = "okay"; ++}; ++ ++/* X5 + X6 Camera & Display interface */ +&i2c2 { + clock-frequency = <384000>; + pinctrl-names = "default", "gpio"; @@ -315,21 +398,9 @@ index 000000000000..b7c45d0a3bcd + scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + status = "okay"; -+ -+ /* NXP SE97BTP with temperature sensor + eeprom */ -+ se97_1c: temperature-sensor-eeprom@1c { -+ compatible = "nxp,se97", "jedec,jc-42.4-temp"; -+ reg = <0x1c>; -+ }; -+ -+ at24c02_54: eeprom@54 { -+ compatible = "nxp,se97b", "atmel,24c02"; -+ reg = <0x54>; -+ pagesize = <16>; -+ vcc-supply = <®_vcc_3v3>; -+ }; +}; + ++/* X1 ID_I2C */ +&i2c3 { + clock-frequency = <384000>; + pinctrl-names = "default", "gpio"; @@ -362,6 +433,18 @@ index 000000000000..b7c45d0a3bcd + }; +}; + ++/* X1 I2C */ ++&i2c5 { ++ clock-frequency = <384000>; ++ pinctrl-names = "default", "gpio"; ++ pinctrl-0 = <&pinctrl_i2c5>; ++ pinctrl-1 = <&pinctrl_i2c5_gpio>; ++ scl-gpios = <&gpio5 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; ++ sda-gpios = <&gpio5 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; ++ status = "okay"; ++}; ++ ++/* X1 I2C on GPIO24/GPIO25 */ +&i2c6 { + clock-frequency = <384000>; + pinctrl-names = "default", "gpio"; @@ -369,6 +452,10 @@ index 000000000000..b7c45d0a3bcd + pinctrl-1 = <&pinctrl_i2c6_gpio>; + scl-gpios = <&gpio2 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio2 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; ++ status = "disabled"; ++}; ++ ++&lcdif3 { + status = "okay"; +}; + @@ -380,6 +467,26 @@ index 000000000000..b7c45d0a3bcd + interrupts = <19 IRQ_TYPE_EDGE_FALLING>; +}; + ++&pcie_phy { ++ clocks = <&hsio_blk_ctrl>; ++ clock-names = "ref"; ++ fsl,refclk-pad-mode = ; ++ status = "okay"; ++}; ++ ++&pcie { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_pcie>; ++ reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>; ++ status = "okay"; ++}; ++ ++&pwm2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_pwm2>; ++ status = "disabled"; ++}; ++ +&pwm3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm3>; @@ -406,9 +513,11 @@ index 000000000000..b7c45d0a3bcd + status = "okay"; +}; + ++/* X1 UART1 */ +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; ++ uart-has-rtscts; + assigned-clocks = <&clk IMX8MP_CLK_UART1>; + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>; + status = "okay"; @@ -417,9 +526,14 @@ index 000000000000..b7c45d0a3bcd +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; ++ uart-has-rtscts; + assigned-clocks = <&clk IMX8MP_CLK_UART2>; + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>; + status = "okay"; ++ ++ bluetooth { ++ compatible = "nxp,88w8987-bt"; ++ }; +}; + +&uart3 { @@ -438,18 +552,18 @@ index 000000000000..b7c45d0a3bcd +}; + +&usb3_0 { -+ fsl,over-current-active-low; ++ fsl,disable-port-power-control; + status = "okay"; +}; + +&usb3_1 { + fsl,disable-port-power-control; + fsl,permanently-attached; -+ dr_mode = "host"; + status = "okay"; +}; + +&usb3_phy0 { ++ vbus-supply = <®_vcc_5v0>; + status = "okay"; +}; + @@ -459,7 +573,7 @@ index 000000000000..b7c45d0a3bcd +}; + +&usb_dwc3_0 { -+ dr_mode = "device"; ++ dr_mode = "peripheral"; + status = "okay"; +}; + @@ -488,6 +602,15 @@ index 000000000000..b7c45d0a3bcd + }; +}; + ++/* X1 SD card on GPIO22-GPIO27 */ ++&usdhc1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_usdhc1>; ++ disable-wp; ++ bus-width = <4>; ++ status = "disabled"; ++}; ++ +&usdhc2 { + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; @@ -503,11 +626,24 @@ index 000000000000..b7c45d0a3bcd +}; + +&iomuxc { ++ pinctrl_backlight: backlightgrp { ++ fsl,pins = ; ++ }; ++ + pinctrl_ecspi3: ecspi3grp { -+ fsl,pins = , -+ , ++ fsl,pins = , ++ , + , -+ ; ++ , ++ ; ++ }; ++ ++ pinctrl_ecspi3_gpio: ecspi3gpiogrp { ++ fsl,pins = , ++ , ++ , ++ , ++ ; + }; + + pinctrl_eqos: eqosgrp { @@ -560,48 +696,67 @@ index 000000000000..b7c45d0a3bcd + }; + + pinctrl_gpio1: gpio1grp { -+ fsl,pins = , -+ , -+ ; ++ fsl,pins = , ++ ; + }; + + pinctrl_gpio2: gpio2grp { -+ fsl,pins = , -+ ; ++ fsl,pins = , ++ , ++ , ++ , ++ , ++ , ++ , ++ ; + }; + + pinctrl_gpio3: gpio3grp { -+ fsl,pins = ; ++ fsl,pins = ; + }; + + pinctrl_gpio4: gpio4grp { -+ fsl,pins = , -+ , -+ ; ++ fsl,pins = , ++ /* PCIE_WAKE# */ ++ , ++ , ++ ; + }; + + pinctrl_gpio5: gpio5grp { -+ fsl,pins = , -+ ; ++ fsl,pins = , ++ ; + }; + + pinctrl_hdmi: hdmigrp { + fsl,pins = , + , + , -+ ; ++ ; + }; + + pinctrl_gpt1: gpt1grp { -+ fsl,pins = ; ++ fsl,pins = ; ++ }; ++ ++ pinctrl_gpt1_gpio: gpt1gpiogrp { ++ fsl,pins = ; + }; + + pinctrl_gpt2: gpt2grp { -+ fsl,pins = ; ++ fsl,pins = ; ++ }; ++ ++ pinctrl_gpt2_gpio: gpt2gpiogrp { ++ fsl,pins = ; + }; + + pinctrl_gpt3: gpt3grp { -+ fsl,pins = ; ++ fsl,pins = ; ++ }; ++ ++ pinctrl_gpt3_gpio: gpt3gpiogrp { ++ fsl,pins = ; + }; + + pinctrl_i2c2: i2c2grp { @@ -634,71 +789,94 @@ index 000000000000..b7c45d0a3bcd + ; + }; + -+ + pinctrl_i2c5: i2c5grp { + fsl,pins = , + ; + }; + + pinctrl_i2c5_gpio: i2c5-gpiogrp { -+ fsl,pins = , -+ ; ++ fsl,pins = , ++ ; + }; + + pinctrl_i2c6: i2c6grp { -+ fsl,pins = , -+ ; ++ fsl,pins = , ++ ; + }; + + pinctrl_i2c6_gpio: i2c6-gpiogrp { -+ fsl,pins = , -+ ; ++ fsl,pins = , ++ ; + }; + + pinctrl_pcf85063: pcf85063grp { -+ fsl,pins = ; ++ fsl,pins = ; ++ }; ++ ++ pinctrl_pcie: pciegrp { ++ fsl,pins = , ++ ; ++ }; ++ ++ pinctrl_lvdsdisplay: lvdsdisplaygrp { ++ fsl,pins = ; ++ }; ++ ++ pinctrl_pwm2: pwm2grp { ++ fsl,pins = ; + }; + -+ /* X1 - PWM3 */ + pinctrl_pwm3: pwm3grp { -+ fsl,pins = ; ++ fsl,pins = ; ++ }; ++ ++ pinctrl_pwm3_gpio: pwm3grpiogrp { ++ fsl,pins = ; + }; + -+ /* X1 - PWM4 */ + pinctrl_pwm4: pwm4grp { -+ fsl,pins = ; ++ fsl,pins = ; + }; + -+ pinctrl_reg12v0: reg12v0grp { -+ fsl,pins = ; ++ pinctrl_pwm4_gpio: pwm4grpiogrp { ++ fsl,pins = ; ++ }; ++ ++ pinctrl_rfkill: rfkillgrp { ++ fsl,pins = ; + }; + + pinctrl_sai5: sai5grp { -+ fsl,pins = , -+ , -+ , -+ , -+ ; ++ fsl,pins = , ++ , ++ , ++ , ++ ; + }; + + pinctrl_tlv320aic3x04: tlv320aic3x04grp { + fsl,pins = ; + }; + -+ /* X1 UART1 */ + pinctrl_uart1: uart1grp { -+ fsl,pins = , ++ fsl,pins = , + , -+ , -+ ; ++ , ++ ; ++ }; ++ ++ pinctrl_uart1_gpio: uart1gpiogrp { ++ fsl,pins = , ++ , ++ , ++ ; + }; + -+ /* Bluetooth UART2 */ + pinctrl_uart2: uart2grp { -+ fsl,pins = , ++ fsl,pins = , + , -+ , -+ ; ++ , ++ ; + }; + + pinctrl_uart3: uart3grp { @@ -707,14 +885,23 @@ index 000000000000..b7c45d0a3bcd + }; + + pinctrl_uart4: uart4grp { -+ fsl,pins = , -+ ; ++ fsl,pins = , ++ ; + }; + + pinctrl_usbhub: usbhubgrp { + fsl,pins = ; + }; + ++ pinctrl_usdhc1: usdhc1grp { ++ fsl,pins = , ++ , ++ , ++ , ++ , ++ ; ++ }; ++ + pinctrl_usdhc2: usdhc2grp { + fsl,pins = , + , @@ -725,15 +912,6 @@ index 000000000000..b7c45d0a3bcd + ; + }; + -+ pinctrl_usdhc1: usdhc1grp { -+ fsl,pins = , -+ , -+ , -+ , -+ , -+ ; -+ }; -+ + pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { + fsl,pins = , + , diff --git a/patch/kernel/archive/imx8m-6.6/0004-arm64-dts-imx8mp-Enable-HDMI-on-TQMa8MPxL-MBa8MP-RAS.patch b/patch/kernel/archive/imx8m-6.6/0004-arm64-dts-imx8mp-Enable-HDMI-on-TQMa8MPxL-MBa8MP-RAS.patch deleted file mode 100644 index b1486fd6e5..0000000000 --- a/patch/kernel/archive/imx8m-6.6/0004-arm64-dts-imx8mp-Enable-HDMI-on-TQMa8MPxL-MBa8MP-RAS.patch +++ /dev/null @@ -1,42 +0,0 @@ -From 2cfee5be091a6b7306c20dc4ef088490d3c0a291 Mon Sep 17 00:00:00 2001 -From: Martin Schmiedel -Date: Wed, 10 Jan 2024 13:10:40 +0100 -Subject: [PATCH] arm64: dts: imx8mp: Enable HDMI on TQMa8MPxL/MBa8MP-RAS314 - -Signed-off-by: Martin Schmiedel ---- - .../imx8mp-tqma8mpql-mba8mp-ras314.dts | 18 ++++++++++++++++++ - 1 file changed, 18 insertions(+) - -diff --git a/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314.dts b/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314.dts -index b7c45d0a3bcd..27830cba1cba 100644 ---- a/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314.dts -+++ b/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314.dts -@@ -275,6 +275,24 @@ &gpio5 { - "", "", "", ""; - }; - -+&hdmi_pvi { -+ status = "okay"; -+}; -+ -+&hdmi_tx { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_hdmi>; -+ status = "okay"; -+}; -+ -+&hdmi_tx_phy { -+ status = "okay"; -+}; -+ -+&lcdif3 { -+ status = "okay"; -+}; -+ - &i2c2 { - clock-frequency = <384000>; - pinctrl-names = "default", "gpio"; --- -2.34.1 - diff --git a/patch/kernel/archive/imx8m-6.6/0005-Add-wifi-support-for-TQMa8MPxL-MBa8MP-RAS314.patch b/patch/kernel/archive/imx8m-6.6/0005-Add-wifi-support-for-TQMa8MPxL-MBa8MP-RAS314.patch deleted file mode 100644 index 3e7b4645e8..0000000000 --- a/patch/kernel/archive/imx8m-6.6/0005-Add-wifi-support-for-TQMa8MPxL-MBa8MP-RAS314.patch +++ /dev/null @@ -1,101 +0,0 @@ -From 6d1e1cb284d6edd78e533bf9c8c54bed39d24356 Mon Sep 17 00:00:00 2001 -From: Martin Schmiedel -Date: Wed, 10 Jan 2024 13:10:41 +0100 -Subject: [PATCH] Add wifi support for TQMa8MPxL-MBa8MP-RAS314 - -- bluetooth not working yet - -Signed-off-by: Martin Schmiedel ---- - .../imx8mp-tqma8mpql-mba8mp-ras314.dts | 43 +++++++++++++++++-- - 1 file changed, 39 insertions(+), 4 deletions(-) - -diff --git a/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314.dts b/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314.dts -index 27830cba1cba..418886187ecc 100644 ---- a/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314.dts -+++ b/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314.dts -@@ -257,15 +257,15 @@ &gpio4 { - "", "", "", "", - "", "", "USER_LED1", "USER_LED2", - "HDMI_OC#", "", "", "", -- "", "", "GPIO19", "GPIO20", -- "", "", "", ""; -+ "", "PCI_WAKE#", "GPIO19", "GPIO20", -+ "PCIE_PERST#", "", "", ""; - }; - - &gpio5 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpio5>; - -- gpio-line-names = "", "GPIO18", "", "", -+ gpio-line-names = "", "GPIO18", "PCIE_W_DISABLE#", "", - "", "", "", "", - "", "", "GPIO21", "CODEC_RST#", - "", "", "", "", -@@ -366,6 +366,29 @@ &pcf85063 { - interrupts = <19 IRQ_TYPE_EDGE_FALLING>; - }; - -+&pcie_phy { -+ clocks = <&hsio_blk_ctrl>; -+ clock-names = "ref"; -+ fsl,clkreq-unsupported; -+ fsl,refclk-pad-mode = ; -+ status = "okay"; -+}; -+ -+&pcie { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_wifi>; -+ reset-gpio = <&gpio4 28 GPIO_ACTIVE_LOW>; -+ status = "okay"; -+ -+ mvl_wifi: wifi@0,0 { -+ compatible = "pci1b4b,2b42"; -+ interrupt-parent = <&gpio4>; -+ interrupts = <25 IRQ_TYPE_LEVEL_LOW>; -+ wakeup-source; -+ status = "okay"; -+ }; -+}; -+ - &pwm3 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pwm3>; -@@ -405,7 +428,13 @@ &uart2 { - pinctrl-0 = <&pinctrl_uart2>; - assigned-clocks = <&clk IMX8MP_CLK_UART2>; - assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>; -- status = "okay"; -+ uart-has-rtscts; -+ status = "disabled"; -+ -+ bluetooth { -+ compatible = "nxp,88w8987-bt"; -+ fw-init-baudrate = <3000000>; -+ }; - }; - - &uart3 { -@@ -568,6 +597,7 @@ pinctrl_gpio4: gpio4grp { - - pinctrl_gpio5: gpio5grp { - fsl,pins = , -+ , - ; - }; - -@@ -743,4 +773,9 @@ pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { - pinctrl_usdhc2_gpio: usdhc2-gpiogrp { - fsl,pins = ; - }; -+ -+ pinctrl_wifi: wifigrp { -+ fsl,pins = , -+ ; -+ }; - }; --- -2.34.1 -