From 34205e60b3efa0ef3acc293ed9e02b801f8a52c1 Mon Sep 17 00:00:00 2001 From: Martin Ayotte Date: Mon, 18 Feb 2019 15:00:02 -0500 Subject: [PATCH] add H6-DMA + H6-SPIs patches --- .../kernel/sunxi-dev/general-add-H6-DMA.patch | 20 +++++++ .../sunxi-dev/general-add-H6-SPIs.patch | 60 +++++++++++++++++++ 2 files changed, 80 insertions(+) create mode 100644 patch/kernel/sunxi-dev/general-add-H6-DMA.patch create mode 100644 patch/kernel/sunxi-dev/general-add-H6-SPIs.patch diff --git a/patch/kernel/sunxi-dev/general-add-H6-DMA.patch b/patch/kernel/sunxi-dev/general-add-H6-DMA.patch new file mode 100644 index 0000000000..e7506d51bf --- /dev/null +++ b/patch/kernel/sunxi-dev/general-add-H6-DMA.patch @@ -0,0 +1,20 @@ +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi~ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi +index c496a82..07301c2 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi~ ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi +@@ -181,6 +181,15 @@ + #reset-cells = <1>; + }; + ++ dma: dma-controller@3002000 { ++ compatible = "allwinner,sun8i-h3-dma"; ++ reg = <0x03002000 0x1000>; ++ interrupts = ; ++ clocks = <&ccu CLK_BUS_DMA>; ++ resets = <&ccu RST_BUS_DMA>; ++ #dma-cells = <1>; ++ }; ++ + gic: interrupt-controller@3021000 { + compatible = "arm,gic-400"; + reg = <0x03021000 0x1000>, diff --git a/patch/kernel/sunxi-dev/general-add-H6-SPIs.patch b/patch/kernel/sunxi-dev/general-add-H6-SPIs.patch new file mode 100644 index 0000000000..673233ee75 --- /dev/null +++ b/patch/kernel/sunxi-dev/general-add-H6-SPIs.patch @@ -0,0 +1,60 @@ +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi +index 9496030..0296eb8 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi +@@ -268,6 +268,16 @@ + bias-pull-up; + }; + ++ spi0_pins: spi0 { ++ pins = "PC2", "PC3", "PC0", "PC5"; ++ function = "spi0"; ++ }; ++ ++ spi1_pins: spi1 { ++ pins = "PH5", "PH6", "PH4", "PH3"; ++ function = "spi1"; ++ }; ++ + uart0_ph_pins: uart0-ph { + pins = "PH0", "PH1"; + function = "uart0"; +@@ -370,6 +375,38 @@ + #size-cells = <0>; + }; + ++ spi0: spi@5010000 { ++ compatible = "allwinner,sun8i-h3-spi"; ++ reg = <0x05010000 0x1000>; ++ interrupts = ; ++ clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>; ++ clock-names = "ahb", "mod"; ++ dmas = <&dma 22>, <&dma 22>; ++ dma-names = "rx", "tx"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spi0_pins>; ++ resets = <&ccu RST_BUS_SPI0>; ++ status = "disabled"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ ++ spi1: spi@5011000 { ++ compatible = "allwinner,sun8i-h3-spi"; ++ reg = <0x05011000 0x1000>; ++ interrupts = ; ++ clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>; ++ clock-names = "ahb", "mod"; ++ dmas = <&dma 23>, <&dma 23>; ++ dma-names = "rx", "tx"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spi1_pins>; ++ resets = <&ccu RST_BUS_SPI1>; ++ status = "disabled"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ + uart0: serial@5000000 { + compatible = "snps,dw-apb-uart"; + reg = <0x05000000 0x400>;