diff --git a/config/kernel/linux-mvebu-edge.config b/config/kernel/linux-mvebu-edge.config index 54ae655cd8..660e167496 100644 --- a/config/kernel/linux-mvebu-edge.config +++ b/config/kernel/linux-mvebu-edge.config @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/arm 6.8.0 Kernel Configuration +# Linux/arm 6.10.3 Kernel Configuration # CONFIG_CC_VERSION_TEXT="arm-linux-gnueabihf-gcc (Ubuntu 11.4.0-1ubuntu1~22.04) 11.4.0" CONFIG_CC_IS_GCC=y @@ -11,8 +11,6 @@ CONFIG_AS_VERSION=23800 CONFIG_LD_IS_BFD=y CONFIG_LD_VERSION=23800 CONFIG_LLD_VERSION=0 -CONFIG_CC_CAN_LINK=y -CONFIG_CC_CAN_LINK_STATIC=y CONFIG_CC_HAS_ASM_GOTO_OUTPUT=y CONFIG_CC_HAS_ASM_GOTO_TIED_OUTPUT=y CONFIG_GCC_ASM_GOTO_OUTPUT_WORKAROUND=y @@ -117,7 +115,7 @@ CONFIG_PREEMPT_NONE=y CONFIG_TICK_CPU_ACCOUNTING=y # CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set # CONFIG_IRQ_TIME_ACCOUNTING is not set -CONFIG_SCHED_THERMAL_PRESSURE=y +CONFIG_SCHED_HW_PRESSURE=y # CONFIG_BSD_PROCESS_ACCT is not set CONFIG_TASKSTATS=y CONFIG_TASK_DELAY_ACCT=y @@ -137,6 +135,7 @@ CONFIG_TREE_SRCU=y CONFIG_NEED_SRCU_NMI_SAFE=y CONFIG_TASKS_RCU_GENERIC=y # CONFIG_FORCE_TASKS_RCU is not set +CONFIG_NEED_TASKS_RCU=y # CONFIG_FORCE_TASKS_RUDE_RCU is not set # CONFIG_FORCE_TASKS_TRACE_RCU is not set CONFIG_TASKS_TRACE_RCU=y @@ -168,6 +167,7 @@ CONFIG_GCC10_NO_ARRAY_BOUNDS=y CONFIG_CC_NO_ARRAY_BOUNDS=y CONFIG_GCC_NO_STRINGOP_OVERFLOW=y CONFIG_CC_NO_STRINGOP_OVERFLOW=y +CONFIG_SLAB_OBJ_EXT=y CONFIG_CGROUPS=y CONFIG_PAGE_COUNTER=y # CONFIG_CGROUP_FAVOR_DYNMODS is not set @@ -228,7 +228,7 @@ CONFIG_POSIX_TIMERS=y CONFIG_PRINTK=y CONFIG_BUG=y CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y +# CONFIG_BASE_SMALL is not set CONFIG_FUTEX=y CONFIG_FUTEX_PI=y CONFIG_EPOLL=y @@ -267,7 +267,6 @@ CONFIG_SYSTEM_DATA_VERIFICATION=y # Kexec and crash features # # CONFIG_KEXEC is not set -# CONFIG_CRASH_DUMP is not set # end of Kexec and crash features # end of General setup @@ -424,7 +423,6 @@ CONFIG_ARM_L1_CACHE_SHIFT=6 CONFIG_ARM_DMA_MEM_BUFFERABLE=y CONFIG_ARM_HEAVY_MB=y CONFIG_DEBUG_ALIGN_RODATA=y -CONFIG_IWMMXT=y CONFIG_PJ4B_ERRATA_4742=y # CONFIG_ARM_ERRATA_430973 is not set CONFIG_ARM_ERRATA_643719=y @@ -492,6 +490,7 @@ CONFIG_ARCH_FLATMEM_ENABLE=y CONFIG_ARCH_SPARSEMEM_ENABLE=y CONFIG_HIGHMEM=y CONFIG_HIGHPTE=y +CONFIG_ARM_PAN=y CONFIG_CPU_SW_DOMAIN_PAN=y CONFIG_HW_PERF_EVENTS=y CONFIG_ARM_MODULE_PLTS=y @@ -614,6 +613,7 @@ CONFIG_ARCH_HIBERNATION_POSSIBLE=y # end of Power management options CONFIG_AS_VFP_VMRS_FPINST=y +CONFIG_CPU_MITIGATIONS=y # # General architecture-dependent options @@ -659,6 +659,7 @@ CONFIG_HAVE_STACKPROTECTOR=y CONFIG_STACKPROTECTOR=y CONFIG_STACKPROTECTOR_STRONG=y CONFIG_LTO_NONE=y +CONFIG_ARCH_SUPPORTS_CFI_CLANG=y CONFIG_HAVE_CONTEXT_TRACKING_USER=y CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y @@ -671,8 +672,11 @@ CONFIG_ARCH_HAS_ELF_RANDOMIZE=y CONFIG_HAVE_ARCH_MMAP_RND_BITS=y CONFIG_HAVE_EXIT_THREAD=y CONFIG_ARCH_MMAP_RND_BITS=8 +CONFIG_HAVE_PAGE_SIZE_4KB=y +CONFIG_PAGE_SIZE_4KB=y CONFIG_PAGE_SIZE_LESS_THAN_64KB=y CONFIG_PAGE_SIZE_LESS_THAN_256KB=y +CONFIG_PAGE_SHIFT=12 CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y CONFIG_CLONE_BACKWARDS=y CONFIG_OLD_SIGSUSPEND3=y @@ -702,7 +706,6 @@ CONFIG_FUNCTION_ALIGNMENT=0 # end of General architecture-dependent options CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 CONFIG_MODULES=y # CONFIG_MODULE_DEBUG is not set # CONFIG_MODULE_FORCE_LOAD is not set @@ -732,7 +735,6 @@ CONFIG_BLK_DEV_INTEGRITY_T10=y CONFIG_BLK_DEV_WRITE_MOUNTED=y CONFIG_BLK_DEV_ZONED=y CONFIG_BLK_DEV_THROTTLING=y -# CONFIG_BLK_DEV_THROTTLING_LOW is not set CONFIG_BLK_WBT=y CONFIG_BLK_WBT_MQ=y # CONFIG_BLK_CGROUP_IOLATENCY is not set @@ -804,7 +806,6 @@ CONFIG_ZPOOL=y CONFIG_SWAP=y CONFIG_ZSWAP=y CONFIG_ZSWAP_DEFAULT_ON=y -# CONFIG_ZSWAP_EXCLUSIVE_LOADS_DEFAULT_ON is not set # CONFIG_ZSWAP_SHRINKER_DEFAULT_ON is not set # CONFIG_ZSWAP_COMPRESSOR_DEFAULT_DEFLATE is not set # CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZO is not set @@ -858,13 +859,13 @@ CONFIG_KSM=y CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 CONFIG_ARCH_WANT_GENERAL_HUGETLB=y CONFIG_CMA=y -# CONFIG_CMA_DEBUG is not set # CONFIG_CMA_DEBUGFS is not set # CONFIG_CMA_SYSFS is not set CONFIG_CMA_AREAS=7 CONFIG_GENERIC_EARLY_IOREMAP=y CONFIG_PAGE_IDLE_FLAG=y CONFIG_IDLE_PAGE_TRACKING=y +CONFIG_ARCH_HAS_CPU_CACHE_ALIASING=y CONFIG_ARCH_HAS_CURRENT_STACK_POINTER=y CONFIG_VM_EVENT_COUNTERS=y # CONFIG_PERCPU_STATS is not set @@ -879,6 +880,7 @@ CONFIG_MEMFD_CREATE=y CONFIG_ARCH_SUPPORTS_PER_VMA_LOCK=y CONFIG_PER_VMA_LOCK=y CONFIG_LOCK_MM_AND_FIND_VMA=y +CONFIG_EXECMEM=y # # Data Access Monitoring @@ -900,7 +902,6 @@ CONFIG_SKB_EXTENSIONS=y CONFIG_PACKET=y CONFIG_PACKET_DIAG=m CONFIG_UNIX=y -CONFIG_UNIX_SCM=y CONFIG_AF_UNIX_OOB=y CONFIG_UNIX_DIAG=m CONFIG_TLS=m @@ -1276,6 +1277,7 @@ CONFIG_IP_VS_PE_SIP=m # IP: Netfilter Configuration # CONFIG_NF_DEFRAG_IPV4=m +CONFIG_IP_NF_IPTABLES_LEGACY=m CONFIG_NF_SOCKET_IPV4=m CONFIG_NF_TPROXY_IPV4=m CONFIG_NF_TABLES_IPV4=y @@ -1308,6 +1310,7 @@ CONFIG_IP_NF_TARGET_TTL=m CONFIG_IP_NF_RAW=m CONFIG_IP_NF_SECURITY=m CONFIG_IP_NF_ARPTABLES=m +CONFIG_NFT_COMPAT_ARP=m CONFIG_IP_NF_ARPFILTER=m CONFIG_IP_NF_ARP_MANGLE=m # end of IP: Netfilter Configuration @@ -1315,6 +1318,7 @@ CONFIG_IP_NF_ARP_MANGLE=m # # IPv6: Netfilter Configuration # +CONFIG_IP6_NF_IPTABLES_LEGACY=m CONFIG_NF_SOCKET_IPV6=m CONFIG_NF_TPROXY_IPV6=m CONFIG_NF_TABLES_IPV6=y @@ -1352,6 +1356,7 @@ CONFIG_NF_TABLES_BRIDGE=m CONFIG_NFT_BRIDGE_META=m CONFIG_NFT_BRIDGE_REJECT=m CONFIG_NF_CONNTRACK_BRIDGE=m +CONFIG_BRIDGE_NF_EBTABLES_LEGACY=m CONFIG_BRIDGE_NF_EBTABLES=m CONFIG_BRIDGE_EBT_BROUTE=m CONFIG_BRIDGE_EBT_T_FILTER=m @@ -1554,7 +1559,6 @@ CONFIG_NET_ACT_GACT=m CONFIG_GACT_PROB=y CONFIG_NET_ACT_MIRRED=m CONFIG_NET_ACT_SAMPLE=m -CONFIG_NET_ACT_IPT=m CONFIG_NET_ACT_NAT=m CONFIG_NET_ACT_PEDIT=m CONFIG_NET_ACT_SIMP=m @@ -1666,7 +1670,6 @@ CONFIG_BT_BNEP=m CONFIG_BT_BNEP_MC_FILTER=y CONFIG_BT_BNEP_PROTO_FILTER=y CONFIG_BT_HIDP=m -CONFIG_BT_HS=y CONFIG_BT_LE=y CONFIG_BT_LE_L2CAP_ECRED=y CONFIG_BT_6LOWPAN=m @@ -1717,6 +1720,7 @@ CONFIG_BT_MTKSDIO=m CONFIG_BT_MTKUART=m CONFIG_BT_VIRTIO=m # CONFIG_BT_NXPUART is not set +# CONFIG_BT_INTEL_PCIE is not set # end of Bluetooth device drivers CONFIG_AF_RXRPC=m @@ -1824,6 +1828,7 @@ CONFIG_LWTUNNEL=y CONFIG_LWTUNNEL_BPF=y CONFIG_DST_CACHE=y CONFIG_GRO_CELLS=y +CONFIG_NET_IEEE8021Q_HELPERS=y CONFIG_NET_SELFTESTS=y CONFIG_NET_SOCK_MSG=y CONFIG_NET_DEVLINK=y @@ -1836,6 +1841,7 @@ CONFIG_ETHTOOL_NETLINK=y # Device Drivers # CONFIG_HAVE_PCI=y +CONFIG_GENERIC_PCI_IOMAP=y CONFIG_PCI=y CONFIG_PCI_DOMAINS=y CONFIG_PCI_DOMAINS_GENERIC=y @@ -1916,7 +1922,6 @@ CONFIG_CXL_PCI=m CONFIG_CXL_MEM=m CONFIG_CXL_PORT=m CONFIG_CXL_SUSPEND=y -CONFIG_CXL_PMU=m # CONFIG_PCCARD is not set CONFIG_RAPIDIO=m CONFIG_RAPIDIO_DISC_TIMEOUT=30 @@ -2098,7 +2103,6 @@ CONFIG_MTD_CFI_UTIL=m # # CONFIG_MTD_COMPLEX_MAPPINGS is not set # CONFIG_MTD_PHYSMAP is not set -# CONFIG_MTD_INTEL_VR_NOR is not set # CONFIG_MTD_PLATRAM is not set # end of Mapping drivers for chip access @@ -2407,8 +2411,6 @@ CONFIG_ATA=y CONFIG_SATA_HOST=y CONFIG_ATA_VERBOSE_ERROR=y CONFIG_ATA_FORCE=y -CONFIG_ARCH_WANT_LIBATA_LEDS=y -CONFIG_ATA_LEDS=y CONFIG_SATA_PMP=y # @@ -2591,6 +2593,7 @@ CONFIG_VXLAN=m CONFIG_GENEVE=m # CONFIG_BAREUDP is not set CONFIG_GTP=m +# CONFIG_PFCP is not set CONFIG_AMT=m CONFIG_MACSEC=m # CONFIG_NETCONSOLE is not set @@ -2648,10 +2651,8 @@ CONFIG_NET_DSA_XRS700X=m CONFIG_NET_DSA_XRS700X_I2C=m CONFIG_NET_DSA_XRS700X_MDIO=m CONFIG_NET_DSA_REALTEK=m -CONFIG_NET_DSA_REALTEK_MDIO=m -CONFIG_NET_DSA_REALTEK_SMI=m -CONFIG_NET_DSA_REALTEK_RTL8365MB=m -CONFIG_NET_DSA_REALTEK_RTL8366RB=m +# CONFIG_NET_DSA_REALTEK_MDIO is not set +# CONFIG_NET_DSA_REALTEK_SMI is not set # CONFIG_NET_DSA_SMSC_LAN9303_I2C is not set # CONFIG_NET_DSA_SMSC_LAN9303_MDIO is not set # CONFIG_NET_DSA_VITESSE_VSC73XX_SPI is not set @@ -2711,7 +2712,6 @@ CONFIG_MV643XX_ETH=y CONFIG_MVMDIO=y CONFIG_MVNETA_BM_ENABLE=y CONFIG_MVNETA=y -CONFIG_MVGMAC=y CONFIG_MVNETA_BM=y CONFIG_MVPP2=y # CONFIG_SKGE is not set @@ -2792,6 +2792,7 @@ CONFIG_SFP=m # # MII PHY device drivers # +# CONFIG_AIR_EN8811H_PHY is not set # CONFIG_AMD_PHY is not set # CONFIG_ADIN_PHY is not set CONFIG_ADIN1100_PHY=m @@ -2827,6 +2828,9 @@ CONFIG_NXP_C45_TJA11XX_PHY=m # CONFIG_NXP_TJA11XX_PHY is not set # CONFIG_NCN26000_PHY is not set # CONFIG_AT803X_PHY is not set +# CONFIG_QCA83XX_PHY is not set +# CONFIG_QCA808X_PHY is not set +# CONFIG_QCA807X_PHY is not set CONFIG_QSEMI_PHY=m CONFIG_REALTEK_PHY=m # CONFIG_RENESAS_PHY is not set @@ -2861,11 +2865,11 @@ CONFIG_CAN_C_CAN=m CONFIG_CAN_C_CAN_PLATFORM=m CONFIG_CAN_C_CAN_PCI=m CONFIG_CAN_CC770=m -CONFIG_CAN_CC770_ISA=m CONFIG_CAN_CC770_PLATFORM=m CONFIG_CAN_CTUCANFD=m CONFIG_CAN_CTUCANFD_PCI=m CONFIG_CAN_CTUCANFD_PLATFORM=m +# CONFIG_CAN_ESD_402_PCI is not set # CONFIG_CAN_IFI_CANFD is not set CONFIG_CAN_M_CAN=m CONFIG_CAN_M_CAN_PCI=m @@ -2879,7 +2883,6 @@ CONFIG_CAN_KVASER_PCI=m CONFIG_CAN_PEAK_PCI=m CONFIG_CAN_PEAK_PCIEC=y CONFIG_CAN_PLX_PCI=m -CONFIG_CAN_SJA1000_ISA=m CONFIG_CAN_SJA1000_PLATFORM=m CONFIG_CAN_SOFTING=m @@ -3221,6 +3224,7 @@ CONFIG_RTLWIFI_PCI=m CONFIG_RTLWIFI_USB=m # CONFIG_RTLWIFI_DEBUG is not set CONFIG_RTL8192C_COMMON=m +CONFIG_RTL8192D_COMMON=m CONFIG_RTL8723_COMMON=m CONFIG_RTLBTCOEXIST=m CONFIG_RTL8XXXU=m @@ -3230,6 +3234,7 @@ CONFIG_RTW88_CORE=m CONFIG_RTW88_PCI=m CONFIG_RTW88_8822B=m CONFIG_RTW88_8822C=m +CONFIG_RTW88_8723X=m CONFIG_RTW88_8723D=m CONFIG_RTW88_8822BE=m # CONFIG_RTW88_8822BS is not set @@ -3239,6 +3244,7 @@ CONFIG_RTW88_8822CE=m # CONFIG_RTW88_8822CU is not set CONFIG_RTW88_8723DE=m # CONFIG_RTW88_8723DS is not set +# CONFIG_RTW88_8723CS is not set # CONFIG_RTW88_8723DU is not set # CONFIG_RTW88_8821CE is not set # CONFIG_RTW88_8821CS is not set @@ -3451,7 +3457,6 @@ CONFIG_VT=y CONFIG_CONSOLE_TRANSLATIONS=y CONFIG_VT_CONSOLE=y CONFIG_VT_CONSOLE_SLEEP=y -CONFIG_HW_CONSOLE=y CONFIG_VT_HW_CONSOLE_BINDING=y CONFIG_UNIX98_PTYS=y # CONFIG_LEGACY_PTYS is not set @@ -3676,7 +3681,6 @@ CONFIG_SPI_MICROCHIP_CORE_QSPI=m # CONFIG_SPI_OC_TINY is not set CONFIG_SPI_ORION=y # CONFIG_SPI_PCI1XXXX is not set -# CONFIG_SPI_PXA2XX is not set # CONFIG_SPI_SC18IS602 is not set # CONFIG_SPI_SIFIVE is not set # CONFIG_SPI_SN_F_OSPI is not set @@ -3728,6 +3732,7 @@ CONFIG_DP83640_PHY=m # CONFIG_PTP_1588_CLOCK_INES is not set # CONFIG_PTP_1588_CLOCK_IDT82P33 is not set # CONFIG_PTP_1588_CLOCK_IDTCM is not set +# CONFIG_PTP_1588_CLOCK_FC3W is not set # CONFIG_PTP_1588_CLOCK_MOCK is not set CONFIG_PTP_1588_CLOCK_OCP=m # end of PTP clock support @@ -3737,10 +3742,12 @@ CONFIG_PINMUX=y CONFIG_PINCONF=y CONFIG_GENERIC_PINCONF=y # CONFIG_DEBUG_PINCTRL is not set +# CONFIG_PINCTRL_AW9523 is not set CONFIG_PINCTRL_CY8C95X0=m # CONFIG_PINCTRL_MCP23S08 is not set # CONFIG_PINCTRL_MICROCHIP_SGPIO is not set # CONFIG_PINCTRL_OCELOT is not set +# CONFIG_PINCTRL_SCMI is not set # CONFIG_PINCTRL_SINGLE is not set CONFIG_PINCTRL_STMFX=m # CONFIG_PINCTRL_SX150X is not set @@ -3861,6 +3868,7 @@ CONFIG_W1_MASTER_DS2490=m CONFIG_W1_MASTER_DS2482=m CONFIG_W1_MASTER_GPIO=m CONFIG_W1_MASTER_SGI=m +# CONFIG_W1_MASTER_UART is not set # end of 1-wire Bus Masters # @@ -3983,9 +3991,11 @@ CONFIG_SENSORS_AHT10=m CONFIG_SENSORS_AQUACOMPUTER_D5NEXT=m CONFIG_SENSORS_AS370=m CONFIG_SENSORS_ASC7621=m +# CONFIG_SENSORS_ASUS_ROG_RYUJIN is not set # CONFIG_SENSORS_AXI_FAN_CONTROL is not set CONFIG_SENSORS_ARM_SCMI=m CONFIG_SENSORS_ATXP1=m +# CONFIG_SENSORS_CHIPCAP2 is not set # CONFIG_SENSORS_CORSAIR_CPRO is not set CONFIG_SENSORS_CORSAIR_PSU=m # CONFIG_SENSORS_DRIVETEMP is not set @@ -4022,6 +4032,7 @@ CONFIG_SENSORS_LTC4222=m CONFIG_SENSORS_LTC4245=m CONFIG_SENSORS_LTC4260=m CONFIG_SENSORS_LTC4261=m +# CONFIG_SENSORS_LTC4282 is not set CONFIG_SENSORS_MAX1111=m CONFIG_SENSORS_MAX127=m CONFIG_SENSORS_MAX16065=m @@ -4070,6 +4081,7 @@ CONFIG_SENSORS_NCT7802=m CONFIG_SENSORS_NCT7904=m CONFIG_SENSORS_NPCM7XX=m CONFIG_SENSORS_NZXT_KRAKEN2=m +# CONFIG_SENSORS_NZXT_KRAKEN3 is not set CONFIG_SENSORS_NZXT_SMART2=m CONFIG_SENSORS_OCC_P8_I2C=m CONFIG_SENSORS_OCC=m @@ -4079,6 +4091,7 @@ CONFIG_SENSORS_PMBUS=m # CONFIG_SENSORS_ACBEL_FSG032 is not set CONFIG_SENSORS_ADM1266=m CONFIG_SENSORS_ADM1275=m +# CONFIG_SENSORS_ADP1050 is not set # CONFIG_SENSORS_BEL_PFE is not set CONFIG_SENSORS_BPA_RS600=m CONFIG_SENSORS_DELTA_AHE50DC_FAN=m @@ -4113,6 +4126,7 @@ CONFIG_SENSORS_MP2975=m CONFIG_SENSORS_MP5023=m # CONFIG_SENSORS_MP5990 is not set # CONFIG_SENSORS_MPQ7932 is not set +# CONFIG_SENSORS_MPQ8785 is not set CONFIG_SENSORS_PIM4328=m CONFIG_SENSORS_PLI1209BC=m # CONFIG_SENSORS_PLI1209BC_REGULATOR is not set @@ -4126,9 +4140,11 @@ CONFIG_SENSORS_TPS53679=m CONFIG_SENSORS_TPS546D24=m CONFIG_SENSORS_UCD9000=m CONFIG_SENSORS_UCD9200=m +# CONFIG_SENSORS_XDP710 is not set CONFIG_SENSORS_XDPE152=m # CONFIG_SENSORS_XDPE122 is not set CONFIG_SENSORS_ZL6100=m +# CONFIG_SENSORS_PT5161L is not set CONFIG_SENSORS_PWM_FAN=m CONFIG_SENSORS_SBTSI=m CONFIG_SENSORS_SBRMI=m @@ -4188,7 +4204,6 @@ CONFIG_THERMAL=y CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 CONFIG_THERMAL_HWMON=y CONFIG_THERMAL_OF=y -CONFIG_THERMAL_WRITABLE_TRIPS=y CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y # CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set # CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set @@ -5146,10 +5161,8 @@ CONFIG_DVB_SP2=m # CONFIG_AUXDISPLAY=y CONFIG_CHARLCD=m -CONFIG_LINEDISP=m CONFIG_HD44780_COMMON=m CONFIG_HD44780=m -CONFIG_IMG_ASCII_LCD=m CONFIG_LCD2S=m CONFIG_PARPORT_PANEL=m CONFIG_PANEL_PARPORT=0 @@ -5158,9 +5171,12 @@ CONFIG_PANEL_PROFILE=5 # CONFIG_CHARLCD_BL_OFF is not set # CONFIG_CHARLCD_BL_ON is not set CONFIG_CHARLCD_BL_FLASH=y +CONFIG_LINEDISP=m +CONFIG_IMG_ASCII_LCD=m +# CONFIG_MAX6959 is not set +# CONFIG_SEG_LED_GPIO is not set CONFIG_PANEL=m # CONFIG_DRM is not set -# CONFIG_DRM_DEBUG_MODESET_LOCK is not set # # Frame buffer Devices @@ -5186,6 +5202,7 @@ CONFIG_LCD_HX8357=m CONFIG_LCD_OTM3225A=m CONFIG_BACKLIGHT_CLASS_DEVICE=m CONFIG_BACKLIGHT_KTD253=m +# CONFIG_BACKLIGHT_KTD2801 is not set # CONFIG_BACKLIGHT_KTZ8866 is not set CONFIG_BACKLIGHT_PWM=m CONFIG_BACKLIGHT_MT6370=m @@ -5385,6 +5402,7 @@ CONFIG_HID_SPEEDLINK=m CONFIG_HID_U2FZERO=m # CONFIG_HID_WACOM is not set # CONFIG_HID_WIIMOTE is not set +# CONFIG_HID_WINWING is not set # CONFIG_HID_XINMO is not set # CONFIG_HID_ZEROPLUS is not set # CONFIG_HID_ZYDACRON is not set @@ -5435,6 +5453,7 @@ CONFIG_USB_DYNAMIC_MINORS=y # CONFIG_USB_OTG_DISABLE_EXTERNAL_HUB is not set CONFIG_USB_LEDS_TRIGGER_USBPORT=y CONFIG_USB_AUTOSUSPEND_DELAY=2 +CONFIG_USB_DEFAULT_AUTHORIZATION_MODE=1 # CONFIG_USB_MON is not set # @@ -5611,7 +5630,7 @@ CONFIG_USB_HSIC_USB3503=y # CONFIG_USB_HSIC_USB4604 is not set # CONFIG_USB_LINK_LAYER_TEST is not set # CONFIG_USB_CHAOSKEY is not set -# CONFIG_USB_ONBOARD_HUB is not set +# CONFIG_USB_ONBOARD_DEV is not set CONFIG_USB_ATM=m # CONFIG_USB_SPEEDTOUCH is not set # CONFIG_USB_CXACRU is not set @@ -5700,8 +5719,6 @@ CONFIG_LEDS_LM3692X=m CONFIG_LEDS_GPIO=y # CONFIG_LEDS_LP3944 is not set # CONFIG_LEDS_LP3952 is not set -CONFIG_LEDS_LP50XX=m -# CONFIG_LEDS_LP55XX_COMMON is not set # CONFIG_LEDS_LP8860 is not set # CONFIG_LEDS_PCA955X is not set # CONFIG_LEDS_PCA963X is not set @@ -5762,7 +5779,6 @@ CONFIG_LEDS_TRIGGER_CAMERA=m CONFIG_LEDS_TRIGGER_PANIC=y CONFIG_LEDS_TRIGGER_NETDEV=m CONFIG_LEDS_TRIGGER_PATTERN=m -CONFIG_LEDS_TRIGGER_AUDIO=m CONFIG_LEDS_TRIGGER_TTY=m # @@ -5823,6 +5839,7 @@ CONFIG_RTC_DRV_PCF85363=m CONFIG_RTC_DRV_S35390A=y # CONFIG_RTC_DRV_FM3130 is not set # CONFIG_RTC_DRV_RX8010 is not set +# CONFIG_RTC_DRV_RX8111 is not set # CONFIG_RTC_DRV_RX8581 is not set # CONFIG_RTC_DRV_RX8025 is not set # CONFIG_RTC_DRV_EM3027 is not set @@ -5980,6 +5997,7 @@ CONFIG_VIRTIO_MENU=y CONFIG_VIRTIO_BALLOON=m CONFIG_VIRTIO_INPUT=m # CONFIG_VIRTIO_MMIO is not set +# CONFIG_VIRTIO_DEBUG is not set # CONFIG_VDPA is not set CONFIG_VHOST_IOTLB=m CONFIG_VHOST_TASK=y @@ -5998,7 +6016,6 @@ CONFIG_VHOST_VSOCK=m # CONFIG_GREYBUS is not set # CONFIG_COMEDI is not set CONFIG_STAGING=y -# CONFIG_PRISM2_USB is not set CONFIG_RTLLIB=m CONFIG_RTLLIB_CRYPTO_CCMP=m CONFIG_RTLLIB_CRYPTO_TKIP=m @@ -6048,11 +6065,9 @@ CONFIG_AD9834=m # end of IIO staging drivers # CONFIG_STAGING_MEDIA is not set -# CONFIG_STAGING_BOARD is not set # CONFIG_LTE_GDM724X is not set # CONFIG_MOST_COMPONENTS is not set # CONFIG_KS7010 is not set -# CONFIG_PI433 is not set CONFIG_XIL_AXIS_FIFO=m CONFIG_FIELDBUS_DEV=m CONFIG_HMS_ANYBUSS_BUS=m @@ -6281,6 +6296,7 @@ CONFIG_BMC150_ACCEL=m CONFIG_BMC150_ACCEL_I2C=m CONFIG_BMC150_ACCEL_SPI=m CONFIG_BMI088_ACCEL=m +CONFIG_BMI088_ACCEL_I2C=m CONFIG_BMI088_ACCEL_SPI=m CONFIG_DA280=m CONFIG_DA311=m @@ -6325,6 +6341,7 @@ CONFIG_AD_SIGMA_DELTA=m # CONFIG_AD7091R5 is not set # CONFIG_AD7091R8 is not set CONFIG_AD7124=m +# CONFIG_AD7173 is not set # CONFIG_AD7192 is not set CONFIG_AD7266=m # CONFIG_AD7280 is not set @@ -6342,8 +6359,10 @@ CONFIG_AD7791=m CONFIG_AD7793=m CONFIG_AD7887=m CONFIG_AD7923=m +# CONFIG_AD7944 is not set CONFIG_AD7949=m CONFIG_AD799X=m +# CONFIG_AD9467 is not set # CONFIG_ADI_AXI_ADC is not set CONFIG_CC10001_ADC=m CONFIG_ENVELOPE_DETECTOR=m @@ -6370,6 +6389,7 @@ CONFIG_MAX1118=m CONFIG_MCP3911=m # CONFIG_MEDIATEK_MT6370_ADC is not set # CONFIG_NAU7802 is not set +# CONFIG_PAC1934 is not set # CONFIG_RICHTEK_RTQ6056 is not set # CONFIG_SD_ADC_MODULATOR is not set CONFIG_TI_ADC081C=m @@ -6382,6 +6402,7 @@ CONFIG_TI_ADC161S626=m CONFIG_TI_ADS1015=m # CONFIG_TI_ADS7924 is not set # CONFIG_TI_ADS1100 is not set +# CONFIG_TI_ADS1298 is not set CONFIG_TI_ADS7950=m CONFIG_TI_ADS8344=m CONFIG_TI_ADS8688=m @@ -6482,6 +6503,8 @@ CONFIG_IIO_ST_SENSORS_CORE=m # CONFIG_AD5593R is not set # CONFIG_AD5504 is not set # CONFIG_AD5624R_SPI is not set +# CONFIG_AD9739A is not set +# CONFIG_ADI_AXI_DAC is not set # CONFIG_LTC2688 is not set CONFIG_AD5686=m CONFIG_AD5686_SPI=m @@ -6541,6 +6564,7 @@ CONFIG_TI_DAC7612=m # CONFIG_ADF4350 is not set CONFIG_ADF4371=m # CONFIG_ADF4377 is not set +# CONFIG_ADMFM2000 is not set CONFIG_ADMV1013=m # CONFIG_ADMV4420 is not set CONFIG_ADRF6780=m @@ -6630,6 +6654,7 @@ CONFIG_ADJD_S311=m # CONFIG_AL3010 is not set CONFIG_AL3320A=m CONFIG_APDS9300=m +# CONFIG_APDS9306 is not set CONFIG_APDS9960=m CONFIG_AS73211=m CONFIG_BH1750=m @@ -6685,6 +6710,7 @@ CONFIG_ZOPT2201=m # # Magnetometer sensors # +# CONFIG_AF8133J is not set CONFIG_AK8974=m CONFIG_AK8975=m CONFIG_AK09911=m @@ -6831,7 +6857,6 @@ CONFIG_MAX31865=m # CONFIG_NTB is not set CONFIG_PWM=y -CONFIG_PWM_SYSFS=y # CONFIG_PWM_DEBUG is not set CONFIG_PWM_ATMEL_TCB=m CONFIG_PWM_CLK=m @@ -6901,6 +6926,7 @@ CONFIG_ARM_CCI_PMU=m CONFIG_ARM_PMU=y # CONFIG_ARM_PMUV3 is not set # CONFIG_DWC_PCIE_PMU is not set +CONFIG_CXL_PMU=m # end of Performance monitor support CONFIG_RAS=y @@ -7075,6 +7101,7 @@ CONFIG_AUTOFS_FS=m CONFIG_FUSE_FS=y CONFIG_CUSE=m CONFIG_VIRTIO_FS=m +CONFIG_FUSE_PASSTHROUGH=y CONFIG_OVERLAY_FS=m # CONFIG_OVERLAY_FS_REDIRECT_DIR is not set CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y @@ -7116,10 +7143,10 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" CONFIG_FAT_DEFAULT_UTF8=y CONFIG_EXFAT_FS=m CONFIG_EXFAT_DEFAULT_IOCHARSET="utf8" -# CONFIG_NTFS_FS is not set CONFIG_NTFS3_FS=m CONFIG_NTFS3_LZX_XPRESS=y CONFIG_NTFS3_FS_POSIX_ACL=y +# CONFIG_NTFS_FS is not set # end of DOS/FAT/EXFAT/NT Filesystems # @@ -7462,6 +7489,7 @@ CONFIG_CRYPTO_ALGAPI=y CONFIG_CRYPTO_ALGAPI2=y CONFIG_CRYPTO_AEAD=y CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_SIG=y CONFIG_CRYPTO_SIG2=y CONFIG_CRYPTO_SKCIPHER=y CONFIG_CRYPTO_SKCIPHER2=y @@ -7633,7 +7661,6 @@ CONFIG_CRYPTO_USER_API_RNG=m # CONFIG_CRYPTO_USER_API_RNG_CAVP is not set CONFIG_CRYPTO_USER_API_AEAD=m CONFIG_CRYPTO_USER_API_ENABLE_OBSOLETE=y -CONFIG_CRYPTO_STATS=y # end of Userspace interface CONFIG_CRYPTO_HASH_INFO=y @@ -7722,7 +7749,6 @@ CONFIG_GENERIC_NET_UTILS=y CONFIG_CORDIC=m # CONFIG_PRIME_NUMBERS is not set CONFIG_RATIONAL=y -CONFIG_GENERIC_PCI_IOMAP=y CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y # @@ -7821,6 +7847,7 @@ CONFIG_ARCH_HAS_SETUP_DMA_OPS=y CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y +CONFIG_DMA_NEED_SYNC=y CONFIG_DMA_NONCOHERENT_MMAP=y CONFIG_ARCH_HAS_DMA_ALLOC=y CONFIG_DMA_CMA=y @@ -7837,7 +7864,6 @@ CONFIG_CMA_ALIGNMENT=8 # CONFIG_DMA_API_DEBUG is not set # CONFIG_DMA_MAP_BENCHMARK is not set CONFIG_SGL_ALLOC=y -# CONFIG_FORCE_NR_CPUS is not set CONFIG_CPU_RMAP=y CONFIG_DQL=y CONFIG_GLOB=y @@ -7848,7 +7874,7 @@ CONFIG_CLZ_TAB=y CONFIG_IRQ_POLL=y CONFIG_MPILIB=y CONFIG_SIGNATURE=y -CONFIG_DIMLIB=y +CONFIG_DIMLIB=m CONFIG_LIBFDT=y CONFIG_OID_REGISTRY=y CONFIG_SG_POOL=y @@ -7917,7 +7943,7 @@ CONFIG_DEBUG_FS_ALLOW_ALL=y # CONFIG_DEBUG_FS_ALLOW_NONE is not set CONFIG_HAVE_ARCH_KGDB=y # CONFIG_KGDB is not set -CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y +CONFIG_ARCH_HAS_UBSAN=y # CONFIG_UBSAN is not set CONFIG_HAVE_KCSAN_COMPILER=y # end of Generic Kernel Debugging Instruments @@ -7940,7 +7966,6 @@ CONFIG_SLUB_DEBUG=y # CONFIG_PAGE_OWNER is not set # CONFIG_PAGE_POISONING is not set # CONFIG_DEBUG_RODATA_TEST is not set -# CONFIG_DEBUG_WX is not set CONFIG_HAVE_DEBUG_KMEMLEAK=y # CONFIG_DEBUG_KMEMLEAK is not set # CONFIG_PER_VMA_LOCK_STATS is not set @@ -7955,6 +7980,7 @@ CONFIG_DEBUG_MEMORY_INIT=y # CONFIG_DEBUG_PER_CPU_MAPS is not set # CONFIG_DEBUG_KMAP_LOCAL is not set # CONFIG_DEBUG_HIGHMEM is not set +# CONFIG_MEM_ALLOC_PROFILING is not set CONFIG_HAVE_ARCH_KASAN=y CONFIG_HAVE_ARCH_KASAN_VMALLOC=y CONFIG_CC_HAS_KASAN_GENERIC=y @@ -8062,6 +8088,7 @@ CONFIG_TRACING_SUPPORT=y # arm Debugging # # CONFIG_ARM_PTDUMP_DEBUGFS is not set +# CONFIG_ARM_DEBUG_WX is not set CONFIG_UNWINDER_ARM=y CONFIG_ARM_UNWIND=y # CONFIG_BACKTRACE_VERBOSE is not set @@ -8098,8 +8125,6 @@ CONFIG_REED_SOLOMON_TEST=m # CONFIG_ATOMIC64_SELFTEST is not set # CONFIG_ASYNC_RAID6_TEST is not set CONFIG_TEST_HEXDUMP=m -# CONFIG_STRING_SELFTEST is not set -# CONFIG_TEST_STRING_HELPERS is not set # CONFIG_TEST_KSTRTOX is not set # CONFIG_TEST_PRINTF is not set CONFIG_TEST_SCANF=m diff --git a/config/sources/families/mvebu.conf b/config/sources/families/mvebu.conf index 2a4dbb17ff..1b98aa3c4a 100644 --- a/config/sources/families/mvebu.conf +++ b/config/sources/families/mvebu.conf @@ -31,13 +31,7 @@ case $BRANCH in edge) - declare -g KERNEL_MAJOR_MINOR="6.8" # Major and minor versions of this kernel. - declare -g KERNEL_SKIP_MAKEFILE_VERSION="yes" # Armbian patches change the version here, so no use having it in the version string. - - declare -g KERNELSOURCE="git://git.armlinux.org.uk/~rmk/linux-arm.git" - declare -g KERNELBRANCH="branch:clearfog" - declare -g KERNELDIR="linux-clearfog" - + declare -g KERNEL_MAJOR_MINOR="6.10" # Major and minor versions of this kernel. ;; esac diff --git a/patch/kernel/archive/mvebu-6.8/09-pci-link-retraining.patch.disabled b/patch/kernel/archive/mvebu-6.8/09-pci-link-retraining.patch.disabled deleted file mode 100644 index e04e8e17a6..0000000000 --- a/patch/kernel/archive/mvebu-6.8/09-pci-link-retraining.patch.disabled +++ /dev/null @@ -1,219 +0,0 @@ -Subject: [PATCH v3] PCI: Disallow retraining link for Atheros chips on non-Gen1 PCIe bridges -Atheros AR9xxx and QCA9xxx chips have behaviour issues not only after a -bus reset, but also after doing retrain link, if PCIe bridge is not in -GEN1 mode (at 2.5 GT/s speed): - -- QCA9880 and QCA9890 chips throw a Link Down event and completely - disappear from the bus and their config space is not accessible - afterwards. - -- QCA9377 chip throws a Link Down event followed by Link Up event, the - config space is accessible and PCI device ID is correct. But trying to - access chip's I/O space causes Uncorrected (Non-Fatal) AER error, - followed by Synchronous external abort 96000210 and Segmentation fault - of insmod while loading ath10k_pci.ko module. - -- AR9390 chip throws a Link Down event followed by Link Up event, config - space is accessible, but contains nonsense values. PCI device ID is - 0xABCD which indicates HW bug that chip itself was not able to read - values from internal EEPROM/OTP. - -- AR9287 chip throws also Link Down and Link Up events, also has - accessible config space containing correct values. But ath9k driver - fails to initialize card from this state as it is unable to access HW - registers. This also indicates that the chip iself is not able to read - values from internal EEPROM/OTP. - -These issues related to PCI device ID 0xABCD and to reading internal -EEPROM/OTP were previously discussed at ath9k-devel mailing list in -following thread: - - https://www.mail-archive.com/ath9k-devel@lists.ath9k.org/msg07529.html - -After experiments we've come up with a solution: it seems that Retrain -link can be called only when using GEN1 PCIe bridge or when PCIe bridge -link speed is forced to 2.5 GT/s. Applying this workaround fixes all -mentioned cards. - -This issue was reproduced with more cards: -- Compex WLE900VX (QCA9880 based / device ID 0x003c) -- QCNFA435 (QCA9377 based / device ID 0x0042) -- Compex WLE200NX (AR9287 based / device ID 0x002e) -- "noname" card (QCA9890 based / device ID 0x003c) -- Wistron NKR-DNXAH1 (AR9390 based / device ID 0x0030) -on Armada 385 with pci-mvebu.c driver and also on Armada 3720 with -pci-aardvark.c driver. - -To workaround this issue, this change introduces a new PCI quirk called -PCI_DEV_FLAGS_NO_RETRAIN_LINK_WHEN_NOT_GEN1, which is enabled for all -Atheros chips with PCI_DEV_FLAGS_NO_BUS_RESET quirk, and also for Atheros -chip AR9287. - -When this quirk is set, kernel disallows triggering PCI_EXP_LNKCTL_RL -bit in config space of PCIe Bridge in the case when PCIe Bridge is -capable of higher speed than 2.5 GT/s and this higher speed is already -allowed. When PCIe Bridge has accessible LNKCTL2 register, we try to -force target link speed to 2.5 GT/s. After this change it is possible -to trigger PCI_EXP_LNKCTL_RL bit without issues. - -Currently only PCIe ASPM kernel code triggers this PCI_EXP_LNKCTL_RL bit, -so quirk check is added only into pcie/aspm.c file. - -Signed-off-by: Pali Rohár -Reported-by: Toke Høiland-Jørgensen -Tested-by: Toke Høiland-Jørgensen -Tested-by: Marek Behún -BugLink: https://lore.kernel.org/linux-pci/87h7l8axqp.fsf@toke.dk/ -BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=84821 -BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=192441 -BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=209833 -Cc: stable@vger.kernel.org # c80851f6ce63a ("PCI: Add PCI_EXP_LNKCTL2_TLS* macros") - ---- -Changes since v1: -* Move whole quirk code into pcie_downgrade_link_to_gen1() function -* Reformat to 80 chars per line where possible -* Add quirk also for cards with AR9287 chip (PCI ID 0x002e) -* Extend commit message description and add information about 0xABCD - -Changes since v2: -* Add quirk also for Atheros QCA9377 chip ---- - drivers/pci/pcie/aspm.c | 44 +++++++++++++++++++++++++++++++++++++++++ - drivers/pci/quirks.c | 39 ++++++++++++++++++++++++++++-------- - include/linux/pci.h | 2 ++ - 3 files changed, 77 insertions(+), 8 deletions(-) - -diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c -index ac0557a305af..729b0389562b 100644 ---- a/drivers/pci/pcie/aspm.c -+++ b/drivers/pci/pcie/aspm.c -@@ -192,12 +192,56 @@ static void pcie_clkpm_cap_init(struct pcie_link_state *link, int blacklist) - link->clkpm_disable = blacklist ? 1 : 0; - } - -+static int pcie_downgrade_link_to_gen1(struct pci_dev *parent) -+{ -+ u16 reg16; -+ u32 reg32; -+ int ret; -+ -+ /* Check if link is capable of higher speed than 2.5 GT/s */ -+ pcie_capability_read_dword(parent, PCI_EXP_LNKCAP, ®32); -+ if ((reg32 & PCI_EXP_LNKCAP_SLS) <= PCI_EXP_LNKCAP_SLS_2_5GB) -+ return 0; -+ -+ /* Check if link speed can be downgraded to 2.5 GT/s */ -+ pcie_capability_read_dword(parent, PCI_EXP_LNKCAP2, ®32); -+ if (!(reg32 & PCI_EXP_LNKCAP2_SLS_2_5GB)) { -+ pci_err(parent, "ASPM: Bridge does not support changing Link Speed to 2.5 GT/s\n"); -+ return -EOPNOTSUPP; -+ } -+ -+ /* Force link speed to 2.5 GT/s */ -+ ret = pcie_capability_clear_and_set_word(parent, PCI_EXP_LNKCTL2, -+ PCI_EXP_LNKCTL2_TLS, -+ PCI_EXP_LNKCTL2_TLS_2_5GT); -+ if (!ret) { -+ /* Verify that new value was really set */ -+ pcie_capability_read_word(parent, PCI_EXP_LNKCTL2, ®16); -+ if ((reg16 & PCI_EXP_LNKCTL2_TLS) != PCI_EXP_LNKCTL2_TLS_2_5GT) -+ ret = -EINVAL; -+ } -+ -+ if (ret) { -+ pci_err(parent, "ASPM: Changing Target Link Speed to 2.5 GT/s failed: %d\n", ret); -+ return ret; -+ } -+ -+ pci_info(parent, "ASPM: Target Link Speed changed to 2.5 GT/s due to quirk\n"); -+ return 0; -+} -+ - static int pcie_retrain_link(struct pcie_link_state *link) - { - struct pci_dev *parent = link->pdev; - int rc; - u16 reg16; - -+ if ((link->downstream->dev_flags & PCI_DEV_FLAGS_NO_RETRAIN_LINK_WHEN_NOT_GEN1) && -+ pcie_downgrade_link_to_gen1(parent)) { -+ pci_err(parent, "ASPM: Retrain Link at higher speed is disallowed by quirk\n"); -+ return false; -+ } -+ - /* - * Ensure the updated LNKCTL parameters are used during link - * training by checking that there is no ongoing link training to -diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c -index 5d2acebc3..91d675e0d 100644 ---- a/drivers/pci/quirks.c -+++ b/drivers/pci/quirks.c -@@ -3572,19 +3572,46 @@ static void quirk_nvidia_no_bus_reset(struct pci_dev *dev) - DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID, - quirk_nvidia_no_bus_reset); - -+ -+static void quirk_no_bus_reset_and_no_retrain_link(struct pci_dev *dev) -+{ -+ dev->dev_flags |= PCI_DEV_FLAGS_NO_BUS_RESET | -+ PCI_DEV_FLAGS_NO_RETRAIN_LINK_WHEN_NOT_GEN1; -+} -+ - /* - * Some Atheros AR9xxx and QCA988x chips do not behave after a bus reset. -+ * Atheros AR9xxx and QCA9xxx chips do not behave after a bus reset and also -+ * after retrain link when PCIe bridge is not in GEN1 mode at 2.5 GT/s speed. - * The device will throw a Link Down error on AER-capable systems and - * regardless of AER, config space of the device is never accessible again - * and typically causes the system to hang or reset when access is attempted. -+ * Or if config space is accessible again then it contains only dummy values -+ * like fixed PCI device ID 0xABCD or values not initialized at all. -+ * Retrain link can be called only when using GEN1 PCIe bridge or when -+ * PCIe bridge has forced link speed to 2.5 GT/s via PCI_EXP_LNKCTL2 register. -+ * To reset these cards it is required to do PCIe Warm Reset via PERST# pin. - * https://lore.kernel.org/r/20140923210318.498dacbd@dualc.maya.org/ -+ * https://lore.kernel.org/r/87h7l8axqp.fsf@toke.dk/ -+ * https://www.mail-archive.com/ath9k-devel@lists.ath9k.org/msg07529.html - */ --DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0030, quirk_no_bus_reset); --DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0032, quirk_no_bus_reset); --DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x003c, quirk_no_bus_reset); --DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0033, quirk_no_bus_reset); --DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0034, quirk_no_bus_reset); --DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x003e, quirk_no_bus_reset); -+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x002e, -+ quirk_no_bus_reset_and_no_retrain_link); -+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0030, -+ quirk_no_bus_reset_and_no_retrain_link); -+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0032, -+ quirk_no_bus_reset_and_no_retrain_link); -+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0033, -+ quirk_no_bus_reset_and_no_retrain_link); -+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0034, -+ quirk_no_bus_reset_and_no_retrain_link); -+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x003e, -+ quirk_no_bus_reset_and_no_retrain_link); -+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x003c, -+ quirk_no_bus_reset_and_no_retrain_link); -+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0042, -+ quirk_no_bus_reset_and_no_retrain_link); -+ - - /* - * Root port on some Cavium CN8xxx chips do not successfully complete a bus -diff --git a/include/linux/pci.h b/include/linux/pci.h -index 86c799c97b77..fdbf7254e4ab 100644 ---- a/include/linux/pci.h -+++ b/include/linux/pci.h -@@ -227,6 +227,8 @@ enum pci_dev_flags { - PCI_DEV_FLAGS_NO_RELAXED_ORDERING = (__force pci_dev_flags_t) (1 << 11), - /* Device does honor MSI masking despite saying otherwise */ - PCI_DEV_FLAGS_HAS_MSI_MASKING = (__force pci_dev_flags_t) (1 << 12), -+ /* Don't Retrain Link for device when bridge is not in GEN1 mode */ -+ PCI_DEV_FLAGS_NO_RETRAIN_LINK_WHEN_NOT_GEN1 = (__force pci_dev_flags_t) (1 << 12), - }; - - enum pci_irq_reroute_variant { --- -2.20.1 diff --git a/patch/kernel/archive/mvebu-6.8/10-fix-dsa-debugfs.patch b/patch/kernel/archive/mvebu-6.8/10-fix-dsa-debugfs.patch deleted file mode 100644 index 5a7b8a5990..0000000000 --- a/patch/kernel/archive/mvebu-6.8/10-fix-dsa-debugfs.patch +++ /dev/null @@ -1,35 +0,0 @@ -From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 -From: John Doe -Date: Tue, 30 Jan 2024 19:44:13 +0100 -Subject: Patching kernel mvebu files - drivers/net/dsa/mv88e6xxx/mv88e6xxx_debugfs.cDisable dsa-port slave print - -Signed-off-by: John Doe ---- - drivers/net/dsa/mv88e6xxx/mv88e6xxx_debugfs.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/drivers/net/dsa/mv88e6xxx/mv88e6xxx_debugfs.c b/drivers/net/dsa/mv88e6xxx/mv88e6xxx_debugfs.c -index 4005a4760884..a5cba5a2965a 100644 ---- a/drivers/net/dsa/mv88e6xxx/mv88e6xxx_debugfs.c -+++ b/drivers/net/dsa/mv88e6xxx/mv88e6xxx_debugfs.c -@@ -218,14 +218,14 @@ static int mv88e6xxx_name_show(struct seq_file *s, void *p) - i = dp->index; - if (!ds->cd->port_names[i]) - continue; - - seq_printf(s, "%4d %s", i, ds->cd->port_names[i]); -- -+#if 0 - if (dp->slave) - seq_printf(s, " (%s)", netdev_name(dp->slave)); -- -+#endif - seq_puts(s, "\n"); - } - - return 0; - } --- -Created with Armbian build tools https://github.com/armbian/build - diff --git a/patch/kernel/archive/mvebu-6.8/91-01-libata-add-ledtrig-support.patch b/patch/kernel/archive/mvebu-6.8/91-01-libata-add-ledtrig-support.patch deleted file mode 100644 index 983ccb7507..0000000000 --- a/patch/kernel/archive/mvebu-6.8/91-01-libata-add-ledtrig-support.patch +++ /dev/null @@ -1,136 +0,0 @@ -Index: 6.1__mvebu__armhf/drivers/ata/Kconfig -=================================================================== ---- 6.1__mvebu__armhf.orig/drivers/ata/Kconfig -+++ 6.1__mvebu__armhf/drivers/ata/Kconfig -@@ -67,6 +67,22 @@ config ATA_FORCE - - If unsure, say Y. - -+config ARCH_WANT_LIBATA_LEDS -+ bool -+ -+config ATA_LEDS -+ bool "support ATA port LED triggers" -+ depends on ARCH_WANT_LIBATA_LEDS -+ select NEW_LEDS -+ select LEDS_CLASS -+ select LEDS_TRIGGERS -+ default y -+ help -+ This option adds a LED trigger for each registered ATA port. -+ It is used to drive disk activity leds connected via GPIO. -+ -+ If unsure, say N. -+ - config ATA_ACPI - bool "ATA ACPI Support" - depends on ACPI -Index: 6.1__mvebu__armhf/drivers/ata/libata-core.c -=================================================================== ---- 6.1__mvebu__armhf.orig/drivers/ata/libata-core.c -+++ 6.1__mvebu__armhf/drivers/ata/libata-core.c -@@ -663,6 +663,19 @@ u64 ata_tf_read_block(const struct ata_t - return block; - } - -+#ifdef CONFIG_ATA_LEDS -+#define LIBATA_BLINK_DELAY 20 /* ms */ -+static inline void ata_led_act(struct ata_port *ap) -+{ -+ unsigned long led_delay = LIBATA_BLINK_DELAY; -+ -+ if (unlikely(!ap->ledtrig)) -+ return; -+ -+ led_trigger_blink_oneshot(ap->ledtrig, &led_delay, &led_delay, 0); -+} -+#endif -+ - /** - * ata_build_rw_tf - Build ATA taskfile for given read/write request - * @qc: Metadata associated with the taskfile to build -@@ -4813,6 +4826,10 @@ void ata_qc_issue(struct ata_queued_cmd - struct ata_link *link = qc->dev->link; - u8 prot = qc->tf.protocol; - -+#ifdef CONFIG_ATA_LEDS -+ ata_led_act(ap); -+#endif -+ - /* Make sure only one non-NCQ command is outstanding. */ - WARN_ON_ONCE(ata_tag_valid(link->active_tag)); - -@@ -5328,6 +5345,9 @@ struct ata_port *ata_port_alloc(struct a - ap->stats.unhandled_irq = 1; - ap->stats.idle_irq = 1; - #endif -+#ifdef CONFIG_ATA_LEDS -+ ap->ledtrig = kzalloc(sizeof(struct led_trigger), GFP_KERNEL); -+#endif - ata_sff_port_init(ap); - - return ap; -@@ -5363,6 +5383,12 @@ static void ata_host_release(struct kref - - kfree(ap->slave_link); - kfree(ap->ncq_sense_buf); -+#ifdef CONFIG_ATA_LEDS -+ if (ap->ledtrig) { -+ led_trigger_unregister(ap->ledtrig); -+ kfree(ap->ledtrig); -+ }; -+#endif - kfree(ap); - host->ports[i] = NULL; - } -@@ -5765,7 +5791,23 @@ int ata_host_register(struct ata_host *h - host->ports[i]->print_id = atomic_inc_return(&ata_print_id); - host->ports[i]->local_port_no = i + 1; - } -+#ifdef CONFIG_ATA_LEDS -+ for (i = 0; i < host->n_ports; i++) { -+ if (unlikely(!host->ports[i]->ledtrig)) -+ continue; - -+ snprintf(host->ports[i]->ledtrig_name, -+ sizeof(host->ports[i]->ledtrig_name), "ata%u", -+ host->ports[i]->print_id); -+ -+ host->ports[i]->ledtrig->name = host->ports[i]->ledtrig_name; -+ -+ if (led_trigger_register(host->ports[i]->ledtrig)) { -+ kfree(host->ports[i]->ledtrig); -+ host->ports[i]->ledtrig = NULL; -+ } -+ } -+#endif - /* Create associated sysfs transport objects */ - for (i = 0; i < host->n_ports; i++) { - rc = ata_tport_add(host->dev,host->ports[i]); -Index: 6.1__mvebu__armhf/include/linux/libata.h -=================================================================== ---- 6.1__mvebu__armhf.orig/include/linux/libata.h -+++ 6.1__mvebu__armhf/include/linux/libata.h -@@ -23,6 +23,9 @@ - #include - #include - #include -+#ifdef CONFIG_ATA_LEDS -+#include -+#endif - - /* - * Define if arch has non-standard setup. This is a _PCI_ standard -@@ -857,6 +860,12 @@ struct ata_port { - #ifdef CONFIG_ATA_ACPI - struct ata_acpi_gtm __acpi_init_gtm; /* use ata_acpi_init_gtm() */ - #endif -+ -+#ifdef CONFIG_ATA_LEDS -+ struct led_trigger *ledtrig; -+ char ledtrig_name[8]; -+#endif -+ - /* owned by EH */ - u8 sector_buf[ATA_SECT_SIZE] ____cacheline_aligned; - }; diff --git a/patch/kernel/archive/mvebu-6.8/91-02-Enable-ATA-port-LED-trigger.patch b/patch/kernel/archive/mvebu-6.8/91-02-Enable-ATA-port-LED-trigger.patch deleted file mode 100644 index 10680f98cb..0000000000 --- a/patch/kernel/archive/mvebu-6.8/91-02-Enable-ATA-port-LED-trigger.patch +++ /dev/null @@ -1,30 +0,0 @@ -From 9ee6345ef82f7af5f98e17a40e667f8ad6b2fa1b Mon Sep 17 00:00:00 2001 -From: aprayoga -Date: Sun, 3 Sep 2017 18:10:12 +0800 -Subject: Enable ATA port LED trigger - ---- - arch/arm/configs/mvebu_v7_defconfig | 1 + - arch/arm/mach-mvebu/Kconfig | 1 + - 2 files changed, 2 insertions(+) - ---- a/arch/arm/configs/mvebu_v7_defconfig -+++ b/arch/arm/configs/mvebu_v7_defconfig -@@ -58,6 +58,7 @@ CONFIG_MTD_UBI=y - CONFIG_EEPROM_AT24=y - CONFIG_BLK_DEV_SD=y - CONFIG_ATA=y -+CONFIG_ATA_LEDS=y - CONFIG_SATA_AHCI=y - CONFIG_AHCI_MVEBU=y - CONFIG_SATA_MV=y ---- a/arch/arm/mach-mvebu/Kconfig -+++ b/arch/arm/mach-mvebu/Kconfig -@@ -56,6 +56,7 @@ config MACH_ARMADA_375 - config MACH_ARMADA_38X - bool "Marvell Armada 380/385 boards" - depends on ARCH_MULTI_V7 -+ select ARCH_WANT_LIBATA_LEDS - select ARM_ERRATA_720789 - select PL310_ERRATA_753970 - select ARM_GIC diff --git a/patch/kernel/archive/mvebu-6.8/92-mvebu-gpio-add_wake_on_gpio_support.patch b/patch/kernel/archive/mvebu-6.8/92-mvebu-gpio-add_wake_on_gpio_support.patch deleted file mode 100644 index 9274f2b1a1..0000000000 --- a/patch/kernel/archive/mvebu-6.8/92-mvebu-gpio-add_wake_on_gpio_support.patch +++ /dev/null @@ -1,88 +0,0 @@ ---- a/drivers/gpio/gpio-mvebu.c -+++ b/drivers/gpio/gpio-mvebu.c -@@ -40,6 +40,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -111,7 +112,7 @@ struct mvebu_gpio_chip { - struct regmap *regs; - u32 offset; - struct regmap *percpu_regs; -- int irqbase; -+ int bank_irq[4]; - struct irq_domain *domain; - int soc_variant; - -@@ -601,6 +602,33 @@ static void mvebu_gpio_irq_handler(struc - } - - /* -+ * Set interrupt number "irq" in the GPIO as a wake-up source. -+ * While system is running, all registered GPIO interrupts need to have -+ * wake-up enabled. When system is suspended, only selected GPIO interrupts -+ * need to have wake-up enabled. -+ * @param irq interrupt source number -+ * @param enable enable as wake-up if equal to non-zero -+ * @return This function returns 0 on success. -+ */ -+static int mvebu_gpio_set_wake_irq(struct irq_data *d, unsigned int enable) -+{ -+ struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); -+ struct mvebu_gpio_chip *mvchip = gc->private; -+ int irq; -+ int bank; -+ -+ bank = d->hwirq % 8; -+ irq = mvchip->bank_irq[bank]; -+ -+ if (enable) -+ enable_irq_wake(irq); -+ else -+ disable_irq_wake(irq); -+ -+ return 0; -+} -+ -+/* - * Functions implementing the pwm_chip methods - */ - static struct mvebu_pwm *to_mvebu_pwm(struct pwm_chip *chip) -@@ -1219,7 +1247,7 @@ static int mvebu_gpio_probe(struct platf - - err = irq_alloc_domain_generic_chips( - mvchip->domain, ngpios, 2, np->name, handle_level_irq, -- IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_LEVEL, 0, 0); -+ IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_LEVEL, 0, IRQ_GC_INIT_NESTED_LOCK); - if (err) { - dev_err(&pdev->dev, "couldn't allocate irq chips %s (DT).\n", - mvchip->chip.label); -@@ -1237,6 +1265,8 @@ static int mvebu_gpio_probe(struct platf - ct->chip.irq_mask = mvebu_gpio_level_irq_mask; - ct->chip.irq_unmask = mvebu_gpio_level_irq_unmask; - ct->chip.irq_set_type = mvebu_gpio_irq_set_type; -+ ct->chip.irq_set_wake = mvebu_gpio_set_wake_irq; -+ ct->chip.flags = IRQCHIP_SET_TYPE_MASKED | IRQCHIP_MASK_ON_SUSPEND; - ct->chip.name = mvchip->chip.label; - - ct = &gc->chip_types[1]; -@@ -1245,6 +1275,8 @@ static int mvebu_gpio_probe(struct platf - ct->chip.irq_mask = mvebu_gpio_edge_irq_mask; - ct->chip.irq_unmask = mvebu_gpio_edge_irq_unmask; - ct->chip.irq_set_type = mvebu_gpio_irq_set_type; -+ ct->chip.irq_set_wake = mvebu_gpio_set_wake_irq; -+ ct->chip.flags = IRQCHIP_SET_TYPE_MASKED | IRQCHIP_MASK_ON_SUSPEND; - ct->handler = handle_edge_irq; - ct->chip.name = mvchip->chip.label; - -@@ -1260,6 +1292,7 @@ static int mvebu_gpio_probe(struct platf - continue; - irq_set_chained_handler_and_data(irq, mvebu_gpio_irq_handler, - mvchip); -+ mvchip->bank_irq[i] = irq; - } - - return 0; diff --git a/patch/kernel/archive/mvebu-6.8/92-mvebu-gpio-remove-hardcoded-timer-assignment.patch b/patch/kernel/archive/mvebu-6.8/92-mvebu-gpio-remove-hardcoded-timer-assignment.patch deleted file mode 100644 index c0cb9d68f9..0000000000 --- a/patch/kernel/archive/mvebu-6.8/92-mvebu-gpio-remove-hardcoded-timer-assignment.patch +++ /dev/null @@ -1,411 +0,0 @@ -Removes the hardcoded timer assignment of timers to pwm controllers. -This allows to use more than one pwm per gpio bank. - -Original patch with chip_data interface by Heisath - -Link: https://wiki.kobol.io/helios4/pwm/#patch-requirement -Co-developed-by: Yureka Lilian -Signed-off-by: Yureka Lilian -Signed-off-by: Finn Behrens ---- - drivers/gpio/gpio-mvebu.c | 223 ++++++++++++++++++++++++-------------- - 1 file changed, 139 insertions(+), 84 deletions(-) - -diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c -index a13f3c18ccd4..303ea3be0b69 100644 ---- a/drivers/gpio/gpio-mvebu.c -+++ b/drivers/gpio/gpio-mvebu.c -@@ -94,21 +94,43 @@ - - #define MVEBU_MAX_GPIO_PER_BANK 32 - --struct mvebu_pwm { -+enum mvebu_pwm_ctrl { -+ MVEBU_PWM_CTRL_SET_A = 0, -+ MVEBU_PWM_CTRL_SET_B, -+ MVEBU_PWM_CTRL_MAX -+}; -+ -+struct mvebu_pwmchip { - struct regmap *regs; - u32 offset; - unsigned long clk_rate; -- struct gpio_desc *gpiod; -- struct pwm_chip chip; - spinlock_t lock; -- struct mvebu_gpio_chip *mvchip; -+ bool in_use; - - /* Used to preserve GPIO/PWM registers across suspend/resume */ -- u32 blink_select; - u32 blink_on_duration; - u32 blink_off_duration; - }; - -+struct mvebu_pwm_chip_drv { -+ enum mvebu_pwm_ctrl ctrl; -+ struct gpio_desc *gpiod; -+ bool master; -+}; -+ -+struct mvebu_pwm { -+ struct pwm_chip chip; -+ struct mvebu_gpio_chip *mvchip; -+ struct mvebu_pwmchip controller; -+ enum mvebu_pwm_ctrl default_controller; -+ -+ /* Used to preserve GPIO/PWM registers across suspend/resume */ -+ u32 blink_select; -+ struct mvebu_pwm_chip_drv drv[]; -+}; -+ -+static struct mvebu_pwmchip *mvebu_pwm_list[MVEBU_PWM_CTRL_MAX]; -+ - struct mvebu_gpio_chip { - struct gpio_chip chip; - struct regmap *regs; -@@ -285,12 +307,12 @@ mvebu_gpio_write_level_mask(struct mvebu_gpio_chip *mvchip, u32 val) - * Functions returning offsets of individual registers for a given - * PWM controller. - */ --static unsigned int mvebu_pwmreg_blink_on_duration(struct mvebu_pwm *mvpwm) -+static unsigned int mvebu_pwmreg_blink_on_duration(struct mvebu_pwmchip *mvpwm) - { - return mvpwm->offset + PWM_BLINK_ON_DURATION_OFF; - } - --static unsigned int mvebu_pwmreg_blink_off_duration(struct mvebu_pwm *mvpwm) -+static unsigned int mvebu_pwmreg_blink_off_duration(struct mvebu_pwmchip *mvpwm) - { - return mvpwm->offset + PWM_BLINK_OFF_DURATION_OFF; - } -@@ -623,39 +645,71 @@ static int mvebu_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm) - struct mvebu_pwm *mvpwm = to_mvebu_pwm(chip); - struct mvebu_gpio_chip *mvchip = mvpwm->mvchip; - struct gpio_desc *desc; -+ enum mvebu_pwm_ctrl id; - unsigned long flags; - int ret = 0; -+ struct mvebu_pwm_chip_drv *drv = &mvpwm->drv[pwm->hwpwm]; - -- spin_lock_irqsave(&mvpwm->lock, flags); -+ spin_lock_irqsave(&mvpwm->controller.lock, flags); - -- if (mvpwm->gpiod) { -+ if (drv->gpiod || (mvchip->blink_en_reg & BIT(pwm->hwpwm))) { - ret = -EBUSY; -- } else { -- desc = gpiochip_request_own_desc(&mvchip->chip, -- pwm->hwpwm, "mvebu-pwm", -- GPIO_ACTIVE_HIGH, -- GPIOD_OUT_LOW); -- if (IS_ERR(desc)) { -- ret = PTR_ERR(desc); -- goto out; -- } -+ goto out; -+ } -+ -+ desc = gpiochip_request_own_desc(&mvchip->chip, -+ pwm->hwpwm, "mvebu-pwm", -+ GPIO_ACTIVE_HIGH, -+ GPIOD_OUT_LOW); -+ if (IS_ERR(desc)) { -+ ret = PTR_ERR(desc); -+ goto out; -+ } - -- mvpwm->gpiod = desc; -+ ret = gpiod_direction_output(desc, 0); -+ if (ret) { -+ gpiochip_free_own_desc(desc); -+ goto out; - } -+ -+ for (id = MVEBU_PWM_CTRL_SET_A; id < MVEBU_PWM_CTRL_MAX; id++) { -+ if (!mvebu_pwm_list[id]->in_use) { -+ drv->ctrl = id; -+ drv->master = true; -+ mvebu_pwm_list[id]->in_use = true; -+ break; -+ } -+ } -+ -+ if (!drv->master) -+ drv->ctrl = mvpwm->default_controller; -+ -+ regmap_update_bits(mvchip->regs, GPIO_BLINK_CNT_SELECT_OFF + mvchip->offset, -+ BIT(pwm->hwpwm), drv->ctrl ? BIT(pwm->hwpwm) : 0); -+ -+ drv->gpiod = desc; -+ -+ regmap_read(mvchip->regs, GPIO_BLINK_CNT_SELECT_OFF + mvchip->offset, -+ &mvpwm->blink_select); - out: -- spin_unlock_irqrestore(&mvpwm->lock, flags); -+ spin_unlock_irqrestore(&mvpwm->controller.lock, flags); - return ret; - } - - static void mvebu_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm) - { - struct mvebu_pwm *mvpwm = to_mvebu_pwm(chip); -+ struct mvebu_pwm_chip_drv *drv = &mvpwm->drv[pwm->hwpwm]; - unsigned long flags; - -- spin_lock_irqsave(&mvpwm->lock, flags); -- gpiochip_free_own_desc(mvpwm->gpiod); -- mvpwm->gpiod = NULL; -- spin_unlock_irqrestore(&mvpwm->lock, flags); -+ spin_lock_irqsave(&mvpwm->controller.lock, flags); -+ if (drv->master) -+ mvebu_pwm_list[drv->ctrl]->in_use = false; -+ -+ gpiochip_free_own_desc(drv->gpiod); -+ memset(drv, 0, sizeof(struct mvebu_pwm_chip_drv)); -+ -+ spin_unlock_irqrestore(&mvpwm->controller.lock, flags); - } - - static int mvebu_pwm_get_state(struct pwm_chip *chip, -@@ -665,28 +719,35 @@ static int mvebu_pwm_get_state(struct pwm_chip *chip, - - struct mvebu_pwm *mvpwm = to_mvebu_pwm(chip); - struct mvebu_gpio_chip *mvchip = mvpwm->mvchip; -+ struct mvebu_pwm_chip_drv *drv = &mvpwm->drv[pwm->hwpwm]; -+ struct mvebu_pwmchip *controller; - unsigned long long val; - unsigned long flags; - u32 u; - -- spin_lock_irqsave(&mvpwm->lock, flags); -+ if (drv->gpiod) -+ controller = mvebu_pwm_list[drv->ctrl]; -+ else -+ controller = &mvpwm->controller; -+ -+ spin_lock_irqsave(&controller->lock, flags); - -- regmap_read(mvpwm->regs, mvebu_pwmreg_blink_on_duration(mvpwm), &u); -+ regmap_read(controller->regs, mvebu_pwmreg_blink_on_duration(controller), &u); - /* Hardware treats zero as 2^32. See mvebu_pwm_apply(). */ - if (u > 0) - val = u; - else - val = UINT_MAX + 1ULL; - state->duty_cycle = DIV_ROUND_UP_ULL(val * NSEC_PER_SEC, -- mvpwm->clk_rate); -+ controller->clk_rate); - -- regmap_read(mvpwm->regs, mvebu_pwmreg_blink_off_duration(mvpwm), &u); -+ regmap_read(controller->regs, mvebu_pwmreg_blink_off_duration(controller), &u); - /* period = on + off duration */ - if (u > 0) - val += u; - else - val += UINT_MAX + 1ULL; -- state->period = DIV_ROUND_UP_ULL(val * NSEC_PER_SEC, mvpwm->clk_rate); -+ state->period = DIV_ROUND_UP_ULL(val * NSEC_PER_SEC, controller->clk_rate); - - regmap_read(mvchip->regs, GPIO_BLINK_EN_OFF + mvchip->offset, &u); - if (u) -@@ -694,7 +755,7 @@ static int mvebu_pwm_get_state(struct pwm_chip *chip, - else - state->enabled = false; - -- spin_unlock_irqrestore(&mvpwm->lock, flags); -+ spin_unlock_irqrestore(&controller->lock, flags); - - return 0; - } -@@ -703,6 +764,8 @@ static int mvebu_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, - const struct pwm_state *state) - { - struct mvebu_pwm *mvpwm = to_mvebu_pwm(chip); -+ struct mvebu_pwm_chip_drv *drv = &mvpwm->drv[pwm->hwpwm]; -+ struct mvebu_pwmchip *controller; - struct mvebu_gpio_chip *mvchip = mvpwm->mvchip; - unsigned long long val; - unsigned long flags; -@@ -711,7 +774,11 @@ static int mvebu_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, - if (state->polarity != PWM_POLARITY_NORMAL) - return -EINVAL; - -- val = (unsigned long long) mvpwm->clk_rate * state->duty_cycle; -+ if (drv->gpiod) -+ controller = mvebu_pwm_list[drv->ctrl]; -+ else -+ controller = &mvpwm->controller; -+ val = (unsigned long long) controller->clk_rate * state->duty_cycle; - do_div(val, NSEC_PER_SEC); - if (val > UINT_MAX + 1ULL) - return -EINVAL; -@@ -726,7 +793,7 @@ static int mvebu_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, - else - on = 1; - -- val = (unsigned long long) mvpwm->clk_rate * state->period; -+ val = (unsigned long long) controller->clk_rate * state->period; - do_div(val, NSEC_PER_SEC); - val -= on; - if (val > UINT_MAX + 1ULL) -@@ -738,16 +805,16 @@ static int mvebu_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, - else - off = 1; - -- spin_lock_irqsave(&mvpwm->lock, flags); -+ spin_lock_irqsave(&controller->lock, flags); - -- regmap_write(mvpwm->regs, mvebu_pwmreg_blink_on_duration(mvpwm), on); -- regmap_write(mvpwm->regs, mvebu_pwmreg_blink_off_duration(mvpwm), off); -+ regmap_write(controller->regs, mvebu_pwmreg_blink_on_duration(controller), on); -+ regmap_write(controller->regs, mvebu_pwmreg_blink_off_duration(controller), off); - if (state->enabled) - mvebu_gpio_blink(&mvchip->chip, pwm->hwpwm, 1); - else - mvebu_gpio_blink(&mvchip->chip, pwm->hwpwm, 0); - -- spin_unlock_irqrestore(&mvpwm->lock, flags); -+ spin_unlock_irqrestore(&controller->lock, flags); - - return 0; - } -@@ -762,25 +829,27 @@ static const struct pwm_ops mvebu_pwm_ops = { - static void __maybe_unused mvebu_pwm_suspend(struct mvebu_gpio_chip *mvchip) - { - struct mvebu_pwm *mvpwm = mvchip->mvpwm; -+ struct mvebu_pwmchip *controller = &mvpwm->controller; - - regmap_read(mvchip->regs, GPIO_BLINK_CNT_SELECT_OFF + mvchip->offset, - &mvpwm->blink_select); -- regmap_read(mvpwm->regs, mvebu_pwmreg_blink_on_duration(mvpwm), -- &mvpwm->blink_on_duration); -- regmap_read(mvpwm->regs, mvebu_pwmreg_blink_off_duration(mvpwm), -- &mvpwm->blink_off_duration); -+ regmap_read(controller->regs, mvebu_pwmreg_blink_on_duration(controller), -+ &controller->blink_on_duration); -+ regmap_read(controller->regs, mvebu_pwmreg_blink_off_duration(controller), -+ &controller->blink_off_duration); - } - - static void __maybe_unused mvebu_pwm_resume(struct mvebu_gpio_chip *mvchip) - { - struct mvebu_pwm *mvpwm = mvchip->mvpwm; -+ struct mvebu_pwmchip *controller = &mvpwm->controller; - - regmap_write(mvchip->regs, GPIO_BLINK_CNT_SELECT_OFF + mvchip->offset, - mvpwm->blink_select); -- regmap_write(mvpwm->regs, mvebu_pwmreg_blink_on_duration(mvpwm), -- mvpwm->blink_on_duration); -- regmap_write(mvpwm->regs, mvebu_pwmreg_blink_off_duration(mvpwm), -- mvpwm->blink_off_duration); -+ regmap_write(controller->regs, mvebu_pwmreg_blink_on_duration(controller), -+ controller->blink_on_duration); -+ regmap_write(controller->regs, mvebu_pwmreg_blink_off_duration(controller), -+ controller->blink_off_duration); - } - - static int mvebu_pwm_probe(struct platform_device *pdev, -@@ -792,6 +861,7 @@ static int mvebu_pwm_probe(struct platform_device *pdev, - void __iomem *base; - u32 offset; - u32 set; -+ enum mvebu_pwm_ctrl ctrl_set; - - if (mvchip->soc_variant == MVEBU_GPIO_SOC_VARIANT_A8K) { - int ret = of_property_read_u32(dev->of_node, -@@ -813,57 +883,39 @@ static int mvebu_pwm_probe(struct platform_device *pdev, - if (IS_ERR(mvchip->clk)) - return PTR_ERR(mvchip->clk); - -- mvpwm = devm_kzalloc(dev, sizeof(struct mvebu_pwm), GFP_KERNEL); -+ mvpwm = devm_kzalloc(dev, struct_size(mvpwm, drv, mvchip->chip.ngpio), GFP_KERNEL); - if (!mvpwm) - return -ENOMEM; - mvchip->mvpwm = mvpwm; - mvpwm->mvchip = mvchip; -- mvpwm->offset = offset; - -- if (mvchip->soc_variant == MVEBU_GPIO_SOC_VARIANT_A8K) { -- mvpwm->regs = mvchip->regs; -+ base = devm_platform_ioremap_resource_byname(pdev, "pwm"); -+ if (IS_ERR(base)) -+ return PTR_ERR(base); -+ mvpwm->controller.regs = devm_regmap_init_mmio(&pdev->dev, base, -+ &mvebu_gpio_regmap_config); -+ if (IS_ERR(mvpwm->controller.regs)) -+ return PTR_ERR(mvpwm->controller.regs); - -- switch (mvchip->offset) { -- case AP80X_GPIO0_OFF_A8K: -- case CP11X_GPIO0_OFF_A8K: -- /* Blink counter A */ -- set = 0; -- break; -- case CP11X_GPIO1_OFF_A8K: -- /* Blink counter B */ -- set = U32_MAX; -- mvpwm->offset += PWM_BLINK_COUNTER_B_OFF; -- break; -- default: -- return -EINVAL; -- } -+ /* -+ * User set A for lines of GPIO chip with id 0, B for GPIO chip -+ * with id 1. Don't allow further GPIO chips to be used for PWM. -+ */ -+ if (id == 0) { -+ set = 0; -+ ctrl_set = MVEBU_PWM_CTRL_SET_A; -+ } else if (id == 1) { -+ set = U32_MAX; -+ ctrl_set = MVEBU_PWM_CTRL_SET_B; - } else { -- base = devm_platform_ioremap_resource_byname(pdev, "pwm"); -- if (IS_ERR(base)) -- return PTR_ERR(base); -- -- mvpwm->regs = devm_regmap_init_mmio(&pdev->dev, base, -- &mvebu_gpio_regmap_config); -- if (IS_ERR(mvpwm->regs)) -- return PTR_ERR(mvpwm->regs); -- -- /* -- * Use set A for lines of GPIO chip with id 0, B for GPIO chip -- * with id 1. Don't allow further GPIO chips to be used for PWM. -- */ -- if (id == 0) -- set = 0; -- else if (id == 1) -- set = U32_MAX; -- else -- return -EINVAL; -+ return -EINVAL; - } - - regmap_write(mvchip->regs, - GPIO_BLINK_CNT_SELECT_OFF + mvchip->offset, set); - -- mvpwm->clk_rate = clk_get_rate(mvchip->clk); -- if (!mvpwm->clk_rate) { -+ mvpwm->controller.clk_rate = clk_get_rate(mvchip->clk); -+ if (!mvpwm->controller.clk_rate) { - dev_err(dev, "failed to get clock rate\n"); - return -EINVAL; - } -@@ -872,7 +924,10 @@ static int mvebu_pwm_probe(struct platform_device *pdev, - mvpwm->chip.ops = &mvebu_pwm_ops; - mvpwm->chip.npwm = mvchip->chip.ngpio; - -- spin_lock_init(&mvpwm->lock); -+ spin_lock_init(&mvpwm->controller.lock); -+ -+ mvpwm->default_controller = ctrl_set; -+ mvebu_pwm_list[ctrl_set] = &mvpwm->controller; - - return devm_pwmchip_add(dev, &mvpwm->chip); - } --- -2.43.0 - - diff --git a/patch/kernel/archive/mvebu-6.8/94-helios4-dts-add-wake-on-lan-support.patch b/patch/kernel/archive/mvebu-6.8/94-helios4-dts-add-wake-on-lan-support.patch deleted file mode 100644 index 2b75913fda..0000000000 --- a/patch/kernel/archive/mvebu-6.8/94-helios4-dts-add-wake-on-lan-support.patch +++ /dev/null @@ -1,21 +0,0 @@ ---- a/arch/arm/boot/dts/marvell/armada-388-helios4.dts -+++ b/arch/arm/boot/dts/marvell/armada-388-helios4.dts -@@ -84,6 +84,18 @@ - }; - }; - -+ gpio-keys { -+ compatible = "gpio-keys"; -+ pinctrl-0 = <µsom_phy0_int_pins>; -+ -+ wol { -+ label = "Wake-On-LAN"; -+ linux,code = ; -+ gpios = <&gpio0 18 GPIO_ACTIVE_LOW>; -+ wakeup-source; -+ }; -+ }; -+ - io-leds { - compatible = "gpio-leds"; - sata1-led { diff --git a/patch/kernel/archive/mvebu-6.8/compile-dtb-with-symbol-support.patch b/patch/kernel/archive/mvebu-6.8/compile-dtb-with-symbol-support.patch deleted file mode 100644 index a2bd279ae4..0000000000 --- a/patch/kernel/archive/mvebu-6.8/compile-dtb-with-symbol-support.patch +++ /dev/null @@ -1,12 +0,0 @@ ---- a/scripts/Makefile.lib -+++ b/scripts/Makefile.lib -@@ -277,6 +277,9 @@ quiet_cmd_gzip = GZIP $@ - DTC ?= $(objtree)/scripts/dtc/dtc - DTC_FLAGS += -Wno-interrupt_provider - -+# Enable overlay support -+DTC_FLAGS += -@ -+ - # Disable noisy checks by default - ifeq ($(findstring 1,$(KBUILD_EXTRA_WARN)),) - DTC_FLAGS += -Wno-unit_address_vs_reg \ diff --git a/patch/kernel/archive/mvebu-6.8/dts-disable-spi-flash-on-a388-microsom.patch b/patch/kernel/archive/mvebu-6.8/dts-disable-spi-flash-on-a388-microsom.patch deleted file mode 100644 index db5c77e0f0..0000000000 --- a/patch/kernel/archive/mvebu-6.8/dts-disable-spi-flash-on-a388-microsom.patch +++ /dev/null @@ -1,10 +0,0 @@ ---- a/arch/arm/boot/dts/marvell/armada-38x-solidrun-microsom.dtsi -+++ b/arch/arm/boot/dts/marvell/armada-38x-solidrun-microsom.dtsi -@@ -107,6 +107,7 @@ - compatible = "w25q32", "jedec,spi-nor"; - reg = <0>; /* Chip select 0 */ - spi-max-frequency = <3000000>; -+ status = "disabled"; - }; - }; - diff --git a/patch/kernel/archive/mvebu-6.8/general-increasing_DMA_block_memory_allocation_to_2048.patch b/patch/kernel/archive/mvebu-6.8/general-increasing_DMA_block_memory_allocation_to_2048.patch deleted file mode 100644 index eef7296e75..0000000000 --- a/patch/kernel/archive/mvebu-6.8/general-increasing_DMA_block_memory_allocation_to_2048.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/arch/arm/mm/dma-mapping.c -+++ b/arch/arm/mm/dma-mapping.c -@@ -315,7 +315,7 @@ static void *__alloc_remap_buffer(struct - pgprot_t prot, struct page **ret_page, - const void *caller, bool want_vaddr); - --#define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K -+#define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_2M - static struct gen_pool *atomic_pool __ro_after_init; - - static size_t atomic_pool_size __initdata = DEFAULT_DMA_COHERENT_POOL_SIZE; diff --git a/patch/kernel/archive/mvebu-6.8/unlock_atheros_regulatory_restrictions.patch b/patch/kernel/archive/mvebu-6.8/unlock_atheros_regulatory_restrictions.patch deleted file mode 100644 index 7e57c379ad..0000000000 --- a/patch/kernel/archive/mvebu-6.8/unlock_atheros_regulatory_restrictions.patch +++ /dev/null @@ -1,70 +0,0 @@ ---- a/drivers/net/wireless/ath/regd.c -+++ b/drivers/net/wireless/ath/regd.c -@@ -50,12 +50,9 @@ static int __ath_regd_init(struct ath_re - #define ATH_5GHZ_5725_5850 REG_RULE(5725-10, 5850+10, 80, 0, 30,\ - NL80211_RRF_NO_IR) - --#define ATH_2GHZ_ALL ATH_2GHZ_CH01_11, \ -- ATH_2GHZ_CH12_13, \ -- ATH_2GHZ_CH14 -+#define ATH_2GHZ_ALL REG_RULE(2400, 2483, 40, 0, 30, 0) - --#define ATH_5GHZ_ALL ATH_5GHZ_5150_5350, \ -- ATH_5GHZ_5470_5850 -+#define ATH_5GHZ_ALL REG_RULE(5140, 5860, 40, 0, 30, 0) - - /* This one skips what we call "mid band" */ - #define ATH_5GHZ_NO_MIDBAND ATH_5GHZ_5150_5350, \ -@@ -77,9 +74,8 @@ static const struct ieee80211_regdomain - .n_reg_rules = 4, - .alpha2 = "99", - .reg_rules = { -- ATH_2GHZ_CH01_11, -- ATH_2GHZ_CH12_13, -- ATH_5GHZ_NO_MIDBAND, -+ ATH_2GHZ_ALL, -+ ATH_5GHZ_ALL, - } - }; - -@@ -88,8 +84,8 @@ static const struct ieee80211_regdomain - .n_reg_rules = 3, - .alpha2 = "99", - .reg_rules = { -- ATH_2GHZ_CH01_11, -- ATH_5GHZ_NO_MIDBAND, -+ ATH_2GHZ_ALL, -+ ATH_5GHZ_ALL, - } - }; - -@@ -98,7 +94,7 @@ static const struct ieee80211_regdomain - .n_reg_rules = 3, - .alpha2 = "99", - .reg_rules = { -- ATH_2GHZ_CH01_11, -+ ATH_2GHZ_ALL, - ATH_5GHZ_ALL, - } - }; -@@ -108,8 +104,7 @@ static const struct ieee80211_regdomain - .n_reg_rules = 4, - .alpha2 = "99", - .reg_rules = { -- ATH_2GHZ_CH01_11, -- ATH_2GHZ_CH12_13, -+ ATH_2GHZ_ALL, - ATH_5GHZ_ALL, - } - }; -@@ -258,9 +253,7 @@ static bool ath_is_radar_freq(u16 center - struct ath_regulatory *reg) - - { -- if (reg->country_code == CTRY_INDIA) -- return (center_freq >= 5500 && center_freq <= 5700); -- return (center_freq >= 5260 && center_freq <= 5700); -+ return false; - } - - static void ath_force_clear_no_ir_chan(struct wiphy *wiphy,