From 2e139987e79e68a4e4c4d98cd9367a057626a673 Mon Sep 17 00:00:00 2001 From: Ricardo Pardini Date: Mon, 20 Oct 2025 21:32:03 +0200 Subject: [PATCH] rockchip64-6.18: add DT patches for NPU on T6(-LTS) and CM3588-NAS --- ...chip-Enable-the-NPU-on-NanoPC-T6-LTS.patch | 69 +++++++++++++++++++ ...ts-rockchip-Enable-the-NPU-on-CM3588.patch | 68 ++++++++++++++++++ 2 files changed, 137 insertions(+) create mode 100644 patch/kernel/archive/rockchip64-6.18/rk3588-1200-arm64-dts-rockchip-Enable-the-NPU-on-NanoPC-T6-LTS.patch create mode 100644 patch/kernel/archive/rockchip64-6.18/rk3588-1201-arm64-dts-rockchip-Enable-the-NPU-on-CM3588.patch diff --git a/patch/kernel/archive/rockchip64-6.18/rk3588-1200-arm64-dts-rockchip-Enable-the-NPU-on-NanoPC-T6-LTS.patch b/patch/kernel/archive/rockchip64-6.18/rk3588-1200-arm64-dts-rockchip-Enable-the-NPU-on-NanoPC-T6-LTS.patch new file mode 100644 index 0000000000..7432e8129d --- /dev/null +++ b/patch/kernel/archive/rockchip64-6.18/rk3588-1200-arm64-dts-rockchip-Enable-the-NPU-on-NanoPC-T6-LTS.patch @@ -0,0 +1,69 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Ricardo Pardini +Date: Mon, 20 Oct 2025 21:25:02 +0200 +Subject: arm64: dts: rockchip: Enable the NPU on NanoPC T6(-LTS) + +Enable the NPU on FriendlyElec NanoPC T6/T6-LTS boards; +vdd_npu_s0 was already in place. + +Signed-off-by: Ricardo Pardini +--- + arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi | 35 ++++++++++ + 1 file changed, 35 insertions(+) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi +index 111111111111..222222222222 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi +@@ -665,6 +665,10 @@ &pd_gpu { + domain-supply = <&vdd_gpu_s0>; + }; + ++&pd_npu { ++ domain-supply = <&vdd_npu_s0>; ++}; ++ + &pinctrl { + gpio-leds { + sys_led_pin: sys-led-pin { +@@ -742,6 +746,37 @@ &pwm1 { + status = "okay"; + }; + ++&rknn_core_0 { ++ npu-supply = <&vdd_npu_s0>; ++ sram-supply = <&vdd_npu_s0>; ++ status = "okay"; ++}; ++ ++&rknn_core_1 { ++ npu-supply = <&vdd_npu_s0>; ++ sram-supply = <&vdd_npu_s0>; ++ status = "okay"; ++}; ++ ++&rknn_core_2 { ++ npu-supply = <&vdd_npu_s0>; ++ sram-supply = <&vdd_npu_s0>; ++ status = "okay"; ++}; ++ ++&rknn_mmu_0 { ++ status = "okay"; ++}; ++ ++&rknn_mmu_1 { ++ status = "okay"; ++}; ++ ++&rknn_mmu_2 { ++ status = "okay"; ++}; ++ ++ + &saradc { + vref-supply = <&avcc_1v8_s0>; + status = "okay"; +-- +Armbian + diff --git a/patch/kernel/archive/rockchip64-6.18/rk3588-1201-arm64-dts-rockchip-Enable-the-NPU-on-CM3588.patch b/patch/kernel/archive/rockchip64-6.18/rk3588-1201-arm64-dts-rockchip-Enable-the-NPU-on-CM3588.patch new file mode 100644 index 0000000000..dfba7e066b --- /dev/null +++ b/patch/kernel/archive/rockchip64-6.18/rk3588-1201-arm64-dts-rockchip-Enable-the-NPU-on-CM3588.patch @@ -0,0 +1,68 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Ricardo Pardini +Date: Mon, 20 Oct 2025 21:29:13 +0200 +Subject: arm64: dts: rockchip: Enable the NPU on CM3588 + +Enable the NPU on FriendlyElec CM3588; +vdd_npu_s0 was already in place. + +Signed-off-by: Ricardo Pardini +--- + arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588.dtsi | 34 ++++++++++ + 1 file changed, 34 insertions(+) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588.dtsi +index 111111111111..222222222222 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588.dtsi +@@ -264,6 +264,10 @@ &pd_gpu { + domain-supply = <&vdd_gpu_s0>; + }; + ++&pd_npu { ++ domain-supply = <&vdd_npu_s0>; ++}; ++ + &pinctrl { + gpio-leds { + led_sys_pin: led-sys-pin { +@@ -294,6 +298,36 @@ sd_s0_pwr: sd-s0-pwr { + }; + }; + ++&rknn_core_0 { ++ npu-supply = <&vdd_npu_s0>; ++ sram-supply = <&vdd_npu_s0>; ++ status = "okay"; ++}; ++ ++&rknn_core_1 { ++ npu-supply = <&vdd_npu_s0>; ++ sram-supply = <&vdd_npu_s0>; ++ status = "okay"; ++}; ++ ++&rknn_core_2 { ++ npu-supply = <&vdd_npu_s0>; ++ sram-supply = <&vdd_npu_s0>; ++ status = "okay"; ++}; ++ ++&rknn_mmu_0 { ++ status = "okay"; ++}; ++ ++&rknn_mmu_1 { ++ status = "okay"; ++}; ++ ++&rknn_mmu_2 { ++ status = "okay"; ++}; ++ + &saradc { + vref-supply = <&avcc_1v8_s0>; + status = "okay"; +-- +Armbian +