diff --git a/patch/kernel/archive/rockchip64-6.1/add-board-orangepi-4-lts.patch b/patch/kernel/archive/rockchip64-6.1/add-board-orangepi-4-lts.patch index d9f02ec383..753dfd6e72 100644 --- a/patch/kernel/archive/rockchip64-6.1/add-board-orangepi-4-lts.patch +++ b/patch/kernel/archive/rockchip64-6.1/add-board-orangepi-4-lts.patch @@ -10,10 +10,10 @@ Subject: [PATCH] rk3399: add Orange Pi 4 LTS device tree diff --git a/arch/arm64/boot/dts/rockchip/rk3399-orangepi-4-lts.dts b/arch/arm64/boot/dts/rockchip/rk3399-orangepi-4-lts.dts new file mode 100644 -index 000000000000..0a4abf995e4b +index 000000000000..6d6bee12a453 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3399-orangepi-4-lts.dts -@@ -0,0 +1,1244 @@ +@@ -0,0 +1,1304 @@ +/* + * SPDX-License-Identifier: (GPL-2.0+ or MIT) + * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd. @@ -1235,6 +1235,8 @@ index 000000000000..0a4abf995e4b +}; + +&dmc { ++ #cooling-cells = <2>; /* min followed by max */ ++ + status = "okay"; + center-supply = <&vdd_log>; + operating-points-v2 = <&dmc_opp_table>; @@ -1258,6 +1260,63 @@ index 000000000000..0a4abf995e4b +&dfi { + status = "okay"; +}; ++ ++/* ++ * Redefine some parameters for the thermal trip points for Opi4 LTS. ++ * First of all, the Soc does not like getting over 90°C. My sample ++ * froze at 94.4°C, so we lower the critical temprature to 90°C, hopefully ++ * giving enough room for safe reboot of the device. ++ * Big cores are getting throttled a bit when reaching 82°C, then at 85°C ++ * we aggressively throttle all the cores and even the memory controller. ++ * The GPU is handled by existing trip points in the base device tree, here ++ * we just set the same critical temperature as CPU. ++ */ ++&cpu_alert0 { ++ temperature = <82000>; ++}; ++ ++&cpu_alert1 { ++ temperature = <85000>; ++}; ++ ++&cpu_crit { ++ temperatue = <90000>; ++}; ++ ++&gpu_crit { ++ temperatue = <90000>; ++}; ++ ++&cpu_thermal { ++ ++ cooling-maps { ++ ++ map0 { ++ trip = <&cpu_alert0>; ++ cooling-device = ++ <&cpu_b0 THERMAL_NO_LIMIT 3>, ++ <&cpu_b1 THERMAL_NO_LIMIT 3>; ++ }; ++ ++ map1 { ++ trip = <&cpu_alert1>; ++ cooling-device = ++ <&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu_l1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu_l2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu_l3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu_b1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; ++ }; ++ ++ map2 { ++ trip = <&cpu_alert1>; ++ cooling-device = ++ <&dmc THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; ++ }; ++ ++ }; ++ ++}; -- 2.34.1 - diff --git a/patch/kernel/archive/rockchip64-6.4/dt/rk3399-orangepi-4-lts.dts b/patch/kernel/archive/rockchip64-6.4/dt/rk3399-orangepi-4-lts.dts index 9911a84acb..2f0baf9fd4 100644 --- a/patch/kernel/archive/rockchip64-6.4/dt/rk3399-orangepi-4-lts.dts +++ b/patch/kernel/archive/rockchip64-6.4/dt/rk3399-orangepi-4-lts.dts @@ -1249,6 +1249,8 @@ }; &dmc { + #cooling-cells = <2>; /* min followed by max */ + status = "okay"; center-supply = <&vdd_log>; operating-points-v2 = <&dmc_opp_table>; @@ -1272,3 +1274,61 @@ &dfi { status = "okay"; }; + +/* + * Redefine some parameters for the thermal trip points for Opi4 LTS. + * First of all, the Soc does not like getting over 90°C. My sample + * froze at 94.4°C, so we lower the critical temprature to 90°C, hopefully + * giving enough room for safe reboot of the device. + * Big cores are getting throttled a bit when reaching 82°C, then at 85°C + * we aggressively throttle all the cores and even the memory controller. + * The GPU is handled by existing trip points in the base device tree, here + * we just set the same critical temperature as CPU. + */ +&cpu_alert0 { + temperature = <82000>; +}; + +&cpu_alert1 { + temperature = <85000>; +}; + +&cpu_crit { + temperatue = <90000>; +}; + +&gpu_crit { + temperatue = <90000>; +}; + +&cpu_thermal { + + cooling-maps { + + map0 { + trip = <&cpu_alert0>; + cooling-device = + <&cpu_b0 THERMAL_NO_LIMIT 3>, + <&cpu_b1 THERMAL_NO_LIMIT 3>; + }; + + map1 { + trip = <&cpu_alert1>; + cooling-device = + <&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_l1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_l2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_l3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_b1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + + map2 { + trip = <&cpu_alert1>; + cooling-device = + <&dmc THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + + }; + +};