diff --git a/config/kernel/linux-sunxi-next.config b/config/kernel/linux-sunxi-next.config index ae28aa1cd7..40acddbec4 100644 --- a/config/kernel/linux-sunxi-next.config +++ b/config/kernel/linux-sunxi-next.config @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/arm 4.13.4 Kernel Configuration +# Linux/arm 4.13.5 Kernel Configuration # CONFIG_ARM=y CONFIG_ARM_HAS_SG_CHAIN=y @@ -3253,6 +3253,7 @@ CONFIG_REGULATOR_GPIO=y # CONFIG_REGULATOR_PV88080 is not set # CONFIG_REGULATOR_PV88090 is not set CONFIG_REGULATOR_PWM=m +CONFIG_REGULATOR_SY8106A=m # CONFIG_REGULATOR_TPS51632 is not set # CONFIG_REGULATOR_TPS62360 is not set # CONFIG_REGULATOR_TPS65023 is not set diff --git a/config/kernel/linux-sunxi64-next.config b/config/kernel/linux-sunxi64-next.config index 36af8c5412..d6aed04dc8 100644 --- a/config/kernel/linux-sunxi64-next.config +++ b/config/kernel/linux-sunxi64-next.config @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/arm64 4.13.4 Kernel Configuration +# Linux/arm64 4.13.5 Kernel Configuration # CONFIG_ARM64=y CONFIG_64BIT=y @@ -2923,6 +2923,7 @@ CONFIG_REGULATOR_QCOM_SPMI=y # CONFIG_REGULATOR_S2MPA01 is not set CONFIG_REGULATOR_S2MPS11=y # CONFIG_REGULATOR_S5M8767 is not set +CONFIG_REGULATOR_SY8106A=m # CONFIG_REGULATOR_TPS51632 is not set # CONFIG_REGULATOR_TPS62360 is not set # CONFIG_REGULATOR_TPS65023 is not set @@ -4276,6 +4277,7 @@ CONFIG_TIMER_OF=y CONFIG_TIMER_PROBE=y CONFIG_ARM_ARCH_TIMER=y CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y +CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y CONFIG_FSL_ERRATUM_A008585=y # CONFIG_HISILICON_ERRATUM_161010101 is not set # CONFIG_ARM64_ERRATUM_858921 is not set diff --git a/patch/kernel/sunxi-next/40-add-SY8106A-regulator-driver.patch b/patch/kernel/sunxi-next/40-add-SY8106A-regulator-driver.patch new file mode 100644 index 0000000000..29d07ccb42 --- /dev/null +++ b/patch/kernel/sunxi-next/40-add-SY8106A-regulator-driver.patch @@ -0,0 +1,236 @@ +From e9807e63fec81bab15b2e8be714d802966ea6425 Mon Sep 17 00:00:00 2001 +From: Ondrej Jirman +Date: Sat, 25 Jun 2016 02:13:50 +0200 +Subject: [PATCH 39/87] regulator: add support for SY8106A regulator + +SY8106A is an I2C attached single output regulator made by Silergy Corp, +which is used on several Allwinner H3/H5 SBCs to control the power +supply of the ARM cores. + +Add a driver for it. + +Signed-off-by: Ondrej Jirman +[Icenowy: Change commit message, remove enable/disable code, add default + ramp_delay] +Signed-off-by: Icenowy Zheng +--- + drivers/regulator/Kconfig | 8 +- + drivers/regulator/Makefile | 2 +- + drivers/regulator/sy8106a-regulator.c | 164 ++++++++++++++++++++++++++++++++++ + 3 files changed, 172 insertions(+), 2 deletions(-) + create mode 100644 drivers/regulator/sy8106a-regulator.c + +diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig +index 99b9362331b5..1efa73e18d07 100644 +--- a/drivers/regulator/Kconfig ++++ b/drivers/regulator/Kconfig +@@ -764,6 +764,13 @@ config REGULATOR_STW481X_VMMC + This driver supports the internal VMMC regulator in the STw481x + PMIC chips. + ++config REGULATOR_SY8106A ++ tristate "Silergy SY8106A regulator" ++ depends on I2C && (OF || COMPILE_TEST) ++ select REGMAP_I2C ++ help ++ This driver supports SY8106A single output regulator. ++ + config REGULATOR_TPS51632 + tristate "TI TPS51632 Power Regulator" + depends on I2C +@@ -938,4 +945,3 @@ config REGULATOR_WM8994 + WM8994 CODEC. + + endif +- +diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile +index 95b1e86ae692..f5120252f86a 100644 +--- a/drivers/regulator/Makefile ++++ b/drivers/regulator/Makefile +@@ -95,6 +95,7 @@ obj-$(CONFIG_REGULATOR_S2MPS11) += s2mps11.o + obj-$(CONFIG_REGULATOR_S5M8767) += s5m8767.o + obj-$(CONFIG_REGULATOR_SKY81452) += sky81452-regulator.o + obj-$(CONFIG_REGULATOR_STW481X_VMMC) += stw481x-vmmc.o ++obj-$(CONFIG_REGULATOR_SY8106A) += sy8106a-regulator.o + obj-$(CONFIG_REGULATOR_TI_ABB) += ti-abb-regulator.o + obj-$(CONFIG_REGULATOR_TPS6105X) += tps6105x-regulator.o + obj-$(CONFIG_REGULATOR_TPS62360) += tps62360-regulator.o +@@ -120,5 +121,4 @@ obj-$(CONFIG_REGULATOR_WM8350) += wm8350-regulator.o + obj-$(CONFIG_REGULATOR_WM8400) += wm8400-regulator.o + obj-$(CONFIG_REGULATOR_WM8994) += wm8994-regulator.o + +- + ccflags-$(CONFIG_REGULATOR_DEBUG) += -DDEBUG +diff --git a/drivers/regulator/sy8106a-regulator.c b/drivers/regulator/sy8106a-regulator.c +new file mode 100644 +index 000000000000..4babc95894e7 +--- /dev/null ++++ b/drivers/regulator/sy8106a-regulator.c +@@ -0,0 +1,164 @@ ++/* ++ * sy8106a-regulator.c - Regulator device driver for SY8106A ++ * ++ * Copyright (C) 2016 Ondřej Jirman ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU Library General Public ++ * License as published by the Free Software Foundation; either ++ * version 2 of the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * Library General Public License for more details. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define SY8106A_REG_VOUT1_SEL 0x01 ++#define SY8106A_REG_VOUT_COM 0x02 ++#define SY8106A_REG_VOUT1_SEL_MASK 0x7f ++#define SY8106A_DISABLE_REG BIT(0) ++#define SY8106A_GO_BIT BIT(7) ++ ++struct sy8106a { ++ struct regulator_dev *rdev; ++ struct regmap *regmap; ++}; ++ ++static const struct regmap_config sy8106a_regmap_config = { ++ .reg_bits = 8, ++ .val_bits = 8, ++}; ++ ++static int sy8106a_set_voltage_sel(struct regulator_dev *rdev, unsigned int sel) ++{ ++ /* We use our set_voltage_sel in order to avoid unnecessary I2C ++ * chatter, because the regulator_get_voltage_sel_regmap using ++ * apply_bit would perform 4 unnecessary transfers instead of one, ++ * increasing the chance of error. ++ */ ++ return regmap_write(rdev->regmap, rdev->desc->vsel_reg, ++ sel | SY8106A_GO_BIT); ++} ++ ++static const struct regulator_ops sy8106a_ops = { ++ .set_voltage_sel = sy8106a_set_voltage_sel, ++ .set_voltage_time_sel = regulator_set_voltage_time_sel, ++ .get_voltage_sel = regulator_get_voltage_sel_regmap, ++ .list_voltage = regulator_list_voltage_linear, ++ /* Enabling/disabling the regulator is not yet implemented */ ++}; ++ ++/* Default limits measured in millivolts and milliamps */ ++#define SY8106A_MIN_MV 680 ++#define SY8106A_MAX_MV 1950 ++#define SY8106A_STEP_MV 10 ++ ++static const struct regulator_desc sy8106a_reg = { ++ .name = "SY8106A", ++ .id = 0, ++ .ops = &sy8106a_ops, ++ .type = REGULATOR_VOLTAGE, ++ .n_voltages = ((SY8106A_MAX_MV - SY8106A_MIN_MV) / SY8106A_STEP_MV) + 1, ++ .min_uV = (SY8106A_MIN_MV * 1000), ++ .uV_step = (SY8106A_STEP_MV * 1000), ++ .vsel_reg = SY8106A_REG_VOUT1_SEL, ++ .vsel_mask = SY8106A_REG_VOUT1_SEL_MASK, ++ /* ++ * This ramp_delay is a conservative default value which works on ++ * H3/H5 boards VDD-CPUX situations. ++ */ ++ .ramp_delay = 200, ++ .owner = THIS_MODULE, ++}; ++ ++/* ++ * I2C driver interface functions ++ */ ++static int sy8106a_i2c_probe(struct i2c_client *i2c, ++ const struct i2c_device_id *id) ++{ ++ struct sy8106a *chip; ++ struct device *dev = &i2c->dev; ++ struct regulator_dev *rdev = NULL; ++ struct regulator_config config = { }; ++ unsigned int selector; ++ int error; ++ ++ chip = devm_kzalloc(&i2c->dev, sizeof(struct sy8106a), GFP_KERNEL); ++ if (!chip) ++ return -ENOMEM; ++ ++ chip->regmap = devm_regmap_init_i2c(i2c, &sy8106a_regmap_config); ++ if (IS_ERR(chip->regmap)) { ++ error = PTR_ERR(chip->regmap); ++ dev_err(&i2c->dev, "Failed to allocate register map: %d\n", ++ error); ++ return error; ++ } ++ ++ config.dev = &i2c->dev; ++ config.regmap = chip->regmap; ++ config.driver_data = chip; ++ ++ config.of_node = dev->of_node; ++ config.init_data = of_get_regulator_init_data(dev, dev->of_node, ++ &sy8106a_reg); ++ ++ if (!config.init_data) ++ return -ENOMEM; ++ ++ /* Probe regulator */ ++ error = regmap_read(chip->regmap, SY8106A_REG_VOUT1_SEL, &selector); ++ if (error) { ++ dev_err(&i2c->dev, "Failed to read voltage at probe time: %d\n", error); ++ return error; ++ } ++ ++ rdev = devm_regulator_register(&i2c->dev, &sy8106a_reg, &config); ++ if (IS_ERR(rdev)) { ++ error = PTR_ERR(rdev); ++ dev_err(&i2c->dev, "Failed to register SY8106A regulator: %d\n", error); ++ return error; ++ } ++ ++ chip->rdev = rdev; ++ ++ i2c_set_clientdata(i2c, chip); ++ ++ return 0; ++} ++ ++static const struct of_device_id sy8106a_i2c_of_match[] = { ++ { .compatible = "silergy,sy8106a" }, ++ { }, ++}; ++MODULE_DEVICE_TABLE(of, sy8106a_i2c_of_match); ++ ++static const struct i2c_device_id sy8106a_i2c_id[] = { ++ { "sy8106a", 0 }, ++ { }, ++}; ++MODULE_DEVICE_TABLE(i2c, sy8106a_i2c_id); ++ ++static struct i2c_driver sy8106a_regulator_driver = { ++ .driver = { ++ .name = "sy8106a", ++ .of_match_table = of_match_ptr(sy8106a_i2c_of_match), ++ }, ++ .probe = sy8106a_i2c_probe, ++ .id_table = sy8106a_i2c_id, ++}; ++ ++module_i2c_driver(sy8106a_regulator_driver); ++ ++MODULE_AUTHOR("Ondřej Jirman "); ++MODULE_DESCRIPTION("Regulator device driver for Silergy SY8106A"); ++MODULE_LICENSE("GPL v2"); +-- +2.13.5 + diff --git a/patch/kernel/sunxi-next/41-h3-h5-Add-r_i2c-controller.patch b/patch/kernel/sunxi-next/41-h3-h5-Add-r_i2c-controller.patch new file mode 100644 index 0000000000..464309fc03 --- /dev/null +++ b/patch/kernel/sunxi-next/41-h3-h5-Add-r_i2c-controller.patch @@ -0,0 +1,45 @@ +From cb4faa1940f5a33c2406c03476cf37ccc32f1997 Mon Sep 17 00:00:00 2001 +From: Ondrej Jirman +Date: Sun, 26 Feb 2017 16:09:28 +0100 +Subject: [PATCH 41/87] ARM: sunxi: h3/h5: Add r_i2c I2C controller + +Allwinner H3/H5 SoCs have an I2C controller at PL GPIO bank. + +Add support for it in the device tree. + +Signed-off-by: Ondrej Jirman +[Icenowy: Change to use r_ccu and change pinmux node name] +Signed-off-by: Icenowy Zheng +Reviewed-by: Chen-Yu Tsai +--- + arch/arm/boot/dts/sunxi-h3-h5.dtsi | 14 ++++++++++++++ + 1 file changed, 14 insertions(+) + +diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi +index 3a5f2aad7449..19fb71d29159 100644 +--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi ++++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi +@@ -624,6 +624,20 @@ + status = "disabled"; + }; + ++ r_i2c: i2c@01f02400 { ++ compatible = "allwinner,sun6i-a31-i2c"; ++ reg = <0x01f02400 0x400>; ++ interrupts = ; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&r_i2c_pins>; ++ clocks = <&r_ccu CLK_APB0_I2C>; ++ clock-frequency = <100000>; ++ resets = <&r_ccu RST_APB0_I2C>; ++ status = "disabled"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ + r_pio: pinctrl@01f02c00 { + compatible = "allwinner,sun8i-h3-r-pinctrl"; + reg = <0x01f02c00 0x400>; +-- +2.13.5 + diff --git a/patch/kernel/sunxi-next/42-h3-h5-Add-r_i2c-pins.patch b/patch/kernel/sunxi-next/42-h3-h5-Add-r_i2c-pins.patch new file mode 100644 index 0000000000..4a81018746 --- /dev/null +++ b/patch/kernel/sunxi-next/42-h3-h5-Add-r_i2c-pins.patch @@ -0,0 +1,35 @@ +From a741524891ac224a94817133c549adfc260ea3a4 Mon Sep 17 00:00:00 2001 +From: Ondrej Jirman +Date: Sun, 26 Feb 2017 16:08:34 +0100 +Subject: [PATCH 40/87] ARM: sunxi: h3/h5: Add r_i2c pinmux node + +H3/H5 SoCs contain an I2C controller optionally available +on the PL0 and PL1 pins. This patch adds pinmux configuration +for this controller. + +Signed-off-by: Ondrej Jirman +[Icenowy: change commit message, node name and function name] +Signed-off-by: Icenowy Zheng +--- + arch/arm/boot/dts/sunxi-h3-h5.dtsi | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi +index d38282b9e5d4..3a5f2aad7449 100644 +--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi ++++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi +@@ -639,6 +639,11 @@ + pins = "PL11"; + function = "s_cir_rx"; + }; ++ ++ r_i2c_pins: r-i2c { ++ pins = "PL0", "PL1"; ++ function = "s_i2c"; ++ }; + }; + }; + }; +-- +2.13.5 + diff --git a/patch/kernel/sunxi-next/43-H3-cpux-allow-set-parent.patch b/patch/kernel/sunxi-next/43-H3-cpux-allow-set-parent.patch new file mode 100644 index 0000000000..9a6d246670 --- /dev/null +++ b/patch/kernel/sunxi-next/43-H3-cpux-allow-set-parent.patch @@ -0,0 +1,36 @@ +From 14663856bae0502be3efa0bff5506507b1e8af26 Mon Sep 17 00:00:00 2001 +From: Icenowy Zheng +Date: Sun, 9 Apr 2017 02:10:34 +0800 +Subject: [PATCH 43/87] clk: sunxi-ng: allow set parent clock (PLL_CPUX) for + CPUX clock on H3 + +The CPUX clock, which is the main clock of the ARM core on Allwinner H3, +can be adjusted by changing the frequency of the PLL_CPUX clock. + +Allowing setting parent clock for the CPUX clock, thus the PLL_CPUX +clock can be adjusted when adjusting the CPUX clock. + +Fixes: 0577e4853bfb ("clk: sunxi-ng: Add H3 clocks") +Signed-off-by: Icenowy Zheng +Reviewed-by: Chen-Yu Tsai +Acked-by: Stephen Boyd +--- + drivers/clk/sunxi-ng/ccu-sun8i-h3.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-h3.c b/drivers/clk/sunxi-ng/ccu-sun8i-h3.c +index b886ebc55eaa..8321d2167cc3 100644 +--- a/drivers/clk/sunxi-ng/ccu-sun8i-h3.c ++++ b/drivers/clk/sunxi-ng/ccu-sun8i-h3.c +@@ -135,7 +135,7 @@ static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_de_clk, "pll-de", + static const char * const cpux_parents[] = { "osc32k", "osc24M", + "pll-cpux" , "pll-cpux" }; + static SUNXI_CCU_MUX(cpux_clk, "cpux", cpux_parents, +- 0x050, 16, 2, CLK_IS_CRITICAL); ++ 0x050, 16, 2, CLK_IS_CRITICAL | CLK_SET_RATE_PARENT); + + static SUNXI_CCU_M(axi_clk, "axi", "cpux", 0x050, 0, 2, 0); + +-- +2.13.5 + diff --git a/patch/kernel/sunxi-next/44-H3-clk-cpu-use-pll-notifier.patch b/patch/kernel/sunxi-next/44-H3-clk-cpu-use-pll-notifier.patch new file mode 100644 index 0000000000..0abd773431 --- /dev/null +++ b/patch/kernel/sunxi-next/44-H3-clk-cpu-use-pll-notifier.patch @@ -0,0 +1,52 @@ +From 33a54161aeee56fbf78b0222fd24ad9846dca269 Mon Sep 17 00:00:00 2001 +From: Chen-Yu Tsai +Date: Thu, 13 Apr 2017 10:13:54 +0800 +Subject: [PATCH 42/87] clk: sunxi-ng: h3: gate then ungate PLL CPU clk after + rate change + +This patch utilizes the new PLL clk notifier to gate then ungate the +PLL CPU clock after rate changes. This should prevent any system hangs +resulting from cpufreq changes to the clk. + +Fixes: 0577e4853bfb ("clk: sunxi-ng: Add H3 clocks") + +Reported-by: Ondrej Jirman +Signed-off-by: Chen-Yu Tsai +Tested-by: Icenowy Zheng +Acked-by: Stephen Boyd +--- + drivers/clk/sunxi-ng/ccu-sun8i-h3.c | 11 +++++++++++ + 1 file changed, 11 insertions(+) + +diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-h3.c b/drivers/clk/sunxi-ng/ccu-sun8i-h3.c +index 552a1ff3f4fc..b886ebc55eaa 100644 +--- a/drivers/clk/sunxi-ng/ccu-sun8i-h3.c ++++ b/drivers/clk/sunxi-ng/ccu-sun8i-h3.c +@@ -1103,6 +1103,13 @@ static const struct sunxi_ccu_desc sun50i_h5_ccu_desc = { + .num_resets = ARRAY_SIZE(sun50i_h5_ccu_resets), + }; + ++static struct ccu_pll_nb sun8i_h3_pll_cpu_nb = { ++ .common = &pll_cpux_clk.common, ++ /* copy from pll_cpux_clk */ ++ .enable = BIT(31), ++ .lock = BIT(28), ++}; ++ + static struct ccu_mux_nb sun8i_h3_cpu_nb = { + .common = &cpux_clk.common, + .cm = &cpux_clk.mux, +@@ -1130,6 +1137,10 @@ static void __init sunxi_h3_h5_ccu_init(struct device_node *node, + + sunxi_ccu_probe(node, reg, desc); + ++ /* Gate then ungate PLL CPU after any rate changes */ ++ ccu_pll_notifier_register(&sun8i_h3_pll_cpu_nb); ++ ++ /* Reparent CPU during PLL CPU rate changes */ + ccu_mux_notifier_register(pll_cpux_clk.common.hw.clk, + &sun8i_h3_cpu_nb); + } +-- +2.13.5 +